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PIC24FV32KA304 Datasheet(PDF) 4 Page - Microchip Technology |
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PIC24FV32KA304 Datasheet(HTML) 4 Page - Microchip Technology |
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4 / 322 page  PIC24FV32KA304 FAMILY DS39995A-page 4 2011 Microchip Technology Inc. High-Performance CPU: • Modified Harvard Architecture • Up to 16 MIPS Operation @ 32 MHz • 8 MHz Internal Oscillator: - 4x PLL option - Multiple clock divide options - Fast start-up • 17-Bit x 17-Bit Single-Cycle Hardware Fractional/ Integer Multiplier • 32-Bit by 16-Bit Hardware Divider • 16 x 16-Bit Working Register Array • C Compiler Optimized Instruction Set Architecture • Linear Program Memory Addressing up to 12 Mbytes • Linear Data Memory Addressing up to 64 Kbytes • Two Address Generation Units for Separate Read and Write Addressing of Data Memory Analog Features: • 12-Bit, up to 16-Channel Analog-to-Digital (A/D) Converter: - 100 ksps conversion rate - Conversion available during Sleep and Idle - Auto-sampling option at fixed intervals during Sleep and Idle modes - Wake-up on Auto-Compare option • Triple Rail-to-Rail Analog Comparators with Programmable Input/Output Configuration • On-Chip Voltage Reference • Charge Time Measurement Unit (CTMU): - Capacitive measurement, up to 16 channels - Time measurement down to 200 ps resolution - Up to 16 external trigger pairs • Internal Temperature Sensor with Dedicated A/D Converter Input PIC24F Device Memory PIC24FV16KA301 /PIC24F16KA301 20 16K 2K 512 5 3322 2 12 3 12 Y PIC24FV32KA301 /PIC24F32KA301 20 32K 2K 512 5 3322 2 12 3 12 Y PIC24FV16KA302 /PIC24F16KA302 28 16K 2K 512 5 3322 2 13 3 13 Y PIC24FV32KA302 /PIC24F32KA302 28 32K 2K 512 5 3322 2 13 3 13 Y PIC24FV16KA304 /PIC24F16KA304 44 16K 2K 512 5 3322 2 16 3 16 Y PIC24FV32KA304 /PIC24F32KA304 44 32K 2K 512 5 3322 2 16 3 16 Y |
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