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HT66F13 Datasheet(PDF) 97 Page - Holtek Semiconductor Inc |
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HT66F13 Datasheet(HTML) 97 Page - Holtek Semiconductor Inc |
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97 / 173 page ![]() As the name of the mode suggests, after a comparison is made, the TM output pin, will change state. The TM output pin condition however only changes state when a TnAF or TnBF interrupt request flag is generated after a compare match occurs from Comparator A or Comparator B. The TnPF interrupt request flag, generated from a compare match from Comparator P, will have no effect on the TM output pin. The way in which the TM output pin changes state is determined by the condition of the TnAIO1 and TnAIO0 bits in the TMnC1 register for ETM CCRA, and the TnBIO1 and TnBIO0 bits in the TMnC2 register for ETM CCRB. The TM output pin can be selected using the TnAIO1, TnAIO0 bits (for the TPnA pin) and TnBIO1, TnBIO0 bits (for the TPnB_0, TPnB_1 or TPnB_2 pins) to go high, to go low or to toggle from its present condition when a compare match occurs from Comparator A or a compare match occurs from Comparator B. The initial condition of the TM output pin, which is setup after the TnON bit changes from low to high, is setup using the TnAOC or TnBOC bit for TPnA or TPnB_0, TPnB_1, TPnB_2 output pins. Note that if the TnAIO1, TnAIO0 and TnBIO1, TnBIO0 bits are zero then no pin change will take place. Rev. 1.10 97 February 9, 2011 HT66F13/HT66F14/HT66F15 Enhanced A/D Flash Type MCU Counter Value 0x3FF CCRP CCRB TnON TnPAU TnBPOL CCRP Int. Flag TnPF CCRB Int. Flag TnBF TPnB O/P Pin Time CCRP=0 CCRP > 0 Counter overflow CCRP > 0 Counter cleared by CCRP value Pause Resume Stop Counter Restart TnCCLR = 0; TnBM [1:0] = 00 Output pin set to initial Level Low if TnBOC=0 Output Toggle with TnBF flag Note TnBIO [1:0] = 10 Active High Output select Here TnBIO [1:0] = 11 Toggle Output select Output not affected by TnBF flag. Remains High until reset by TnON bit Output Pin Reset to Initial value Output controlled by other pin-shared function Output Inverts when TnBPOL is high ETM CCRB Compare Match Output Mode -- TnCCLR = 0 Note: 1. With TnCCLR=0 a Comparator P match will clear the counter 2. The TPnB output pin is controlled only by the TnBF flag 3. The output pin is reset to its initial state by a TnON bit rising edge |
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