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MCP73861 Datasheet(PDF) 13 Page - Microchip Technology |
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MCP73861 Datasheet(HTML) 13 Page - Microchip Technology |
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13 / 34 page  2011 Microchip Technology Inc. DS21893E-page 13 MCP73861/2/3/4 3.0 PIN DESCRIPTION The descriptions of the pins are listed in Table 3.1. 3.1 Voltage Regulation Selection (VSET) MCP73861/3: Connect VSET to VSS for 4.1V regulation voltage, connect to VDD for 4.2V regulation voltage. MCP73862/4: Connect VSET to VSS for 8.2V regulation voltage, connect to VDD for 8.4V regulation voltage. 3.2 Battery Management Input Supply (VDD2, VDD1) A supply voltage of [VREG (typ.) + 0.3V] to 12V is rec- ommended. Bypass to VSS with a minimum of 4.7 µF. 3.3 Battery Management 0V Reference (VSS1, VSS2, VSS3) Connect to negative terminal of battery and input supply. 3.4 Current Regulation Set (PROG) Preconditioning, fast and termination currents are scaled by placing a resistor from PROG to VSS. 3.5 Cell Temperature Sensor Bias (THREF) THREF is a voltage reference to bias external thermis- tor for continuous cell temperature monitoring and prequalification. 3.6 Cell Temperature Sensor Input (THERM) THERM is an input for an external thermistor for contin- uous cell-temperature monitoring and prequalification. Connect to THREF/3 to disable temperature sensing. 3.7 Timer Set All safety timers are scaled by CTIMER/0.1 µF. 3.8 Battery Charge Control Output (VBAT1, VBAT2) Connect to positive terminal of battery. Drain terminal of internal P-channel MOSFET pass transistor. Bypass to VSS with a minimum of 4.7 µF to ensure loop stability when the battery is disconnected. 3.9 Battery Voltage Sense (VBAT3) VBAT3 is a voltage sense input. Connect to positive ter- minal of battery. A precision internal resistor divider regulates the final voltage on this pin to VREG. 3.10 Logic Enable (EN) EN is an input to force charge termination, initiate charge, clear faults or disable automatic recharge. TABLE 3-1: PIN FUNCTION TABLE MCP73861/2/3/4 Symbol Function QFN SOIC 13 VSET Voltage Regulation Selection 24 VDD1 Battery Management Input Supply 35 VDD2 Battery Management Input Supply 46 VSS1 Battery Management 0V Reference 5 7 PROG Current Regulation Set 6 8 THREF Cell Temperature Sensor Bias 7 9 THERM Cell Temperature Sensor Input 810 TIMER Timer Set 911 VSS3 Battery Management 0V Reference 10 12 VBAT1 Battery Charge Control Output 11 13 VBAT2 Battery Charge Control Output 12 14 VBAT3 Battery Voltage Sense 13 15 VSS2 Battery Management 0V Reference 14 16 EN Logic Enable 15 1 STAT2 Fault Status Output 16 2 STAT1 Charge Status Output 17 – EP Exposed Pad; Battery Management 0V Reference |
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