PIC24F04KA201 datasheet(20/26 Pages) MICROCHIP

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PIC24FXXKA2XX

DS39991A-page 20

 2010 Microchip Technology Inc.

3.10

Verifying Code Memory and

Configuration Registers

To verify the code memory, read the code memory

space and compare it with the copy held in the

programmer’s buffer. Figure 3-9 illustrates the verify

process flowchart. Memory reads occur 1 byte at a

time, hence 2 bytes must be read to compare with the

word in the programmer’s buffer. Refer to Section 3.8

“Reading Code Memory” for implementation details

of reading code memory. On the same lines, the data

EEPROM and Configuration registers can be verified.

FIGURE 3-9:

VERIFY CODE MEMORY

FLOW

3.11

Exiting ICSP Mode

Exit the Program/Verify mode by removing VIH from

MCLR/VPP as illustrated in Figure 3-10. The only

requirement to exit is that an interval of P16 should

elapse between the last clock and the program signals

on PGCx and PGDx before removing VIH.

FIGURE 3-10:

EXITING ICSP™ MODE

Note:

Code

memory

should

verified

immediately after writing if code protection

is enabled. Since Configuration registers

include the device code protection bit, the

device will not be readable or verifiable if a

device Reset occurs after the code-protect

bits are set (value = 0).

Read Low Byte

Read High Byte

Does

Word = Expect

Data?

All

code memory

verified?

Yes

Set TBLPTR = 0

Start

Yes

End

with Post-Increment

Failure

Report Error

MCLR/VPP

P16

PGDx

PGD = Input

PGCx

VDD

VIH/VIHH

VIH

P17

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