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ACS8510 Datasheet(PDF) 39 Page - Semtech Corporation |
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ACS8510 Datasheet(HTML) 39 Page - Semtech Corporation |
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39 / 69 page ![]() Revision 2.07/Jan 2001 ã2001 Semtech Corp www.semtech.com 39 ACS8510 SETS ADVANCED COMMUNCIATIONS FINAL Holdover mode The Holdover mode is used when the ACS8510 was in Locked mode for long enough to acquire stable frequency data, but the final selected reference source has become unavailable and a replacement has not yet been qualified for selection. In Holdover mode, the ACS8510 provides the timing and synchronisation signals to maintain the Network Element (NE), but they are not phase locked to any input reference source. The timing is based on a stored value of the frequency ratio obtained during the last Locked mode period. The Holdover performance is mainly limited by what is happening to the TCXO. The ACS8510 has 3 ways of determining Holdover, either; 1. By external frequency setting (cnfg_holdover_offset register) 2. By an internal frequency measuring and averaging system which averages the last 20 minutes 3. By just using the last frequency (as reported by the sts_curr_inc_offset register). This value can be read out of the device and used to build up a longer term average using an external averaging circuit. This value can then to readback into the device and used as the Holdover offset (via cnfg_holdover_offset register). By default it uses the internal averager. This means that if the TCXO frequency is varying due to temperature fluctuations in the room, then the instantaneous value can be different from the average value, and then it may be possible to exceed the 0.05 ppm limit (depending on how extreme the temperature flucuations are). It is advantageous to shield the TCXO to slow down frequency changes due to drift and external temperature fluctuations. The frequency accuracy of Holdover mode has to meet the ITU-T, ETSI and Telcordia performance requirements. The performance of the external oscillator clock is critical in this mode, although only the frequency stability is important - the stability of the output clock in Hold-Over is directly related to the stability of the external oscillator. Pre-Locked(2) mode This state is very similar to the Pre-Locked(1) state. It is entered from the Holdover state when a reference source has been selected and applied to the phase locked loop. It is also entered if the device is operating in revertive mode and a higher-priority reference source is restored. Upon applying a reference source to the phase locked loop, the ACS8510 will enter the Locked state in a maximum of 100 seconds, as defined by GR-1244-CORE specification, if the selected reference source is of good quality. If the device cannot achieve lock within 100 seconds, it reverts to Holdover mode and another reference source is selected. Protection Facility The ACS8510 supports redundancy protection. The primary functions of this include: - Alignment of the priority tables of both Master and Slave ACS8510 devices so as to align the selection of reference sources of both Master and Slave ACS8510 devices. - Alignment of the phases of the 8 kHz and 2 kHz clocks in both Master and Slave ACS8510 devices to within one cycle of the 77.76 MHz internal clock. When two ACS8510 devices are to be used in a redundancy-protection scheme within an NE, one will be designated as the Master and the other as the Slave. It is expected that an NE will use the T OUT0 output for its internal operations because the T OUT4 output is intended to feed an SSU/BITS system. An SSU/BITS will not be bothered by phase differences between |
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