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LPC1759 Datasheet(PDF) 39 Page - NXP Semiconductors |
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LPC1759 Datasheet(HTML) 39 Page - NXP Semiconductors |
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39 / 74 page ![]() LPC1759_58_56_54_52_51 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 — 29 March 2011 39 of 74 NXP Semiconductors LPC1759/58/56/54/52/51 32-bit ARM Cortex-M3 microcontroller 10. Static characteristics Table 6. Static characteristics Tamb = 40 C to +85 C, unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit Supply pins VDD(3V3) supply voltage (3.3 V) external rail [2] 2.4 3.3 3.6 V VDD(REG)(3V3) regulator supply voltage (3.3 V) 2.4 3.3 3.6 V VDDA analog 3.3 V pad supply voltage 2.7 3.3 3.6 V Vi(VBAT) input voltage on pin VBAT [3] 2.1 3.3 3.6 V Vi(VREFP) input voltage on pin VREFP 2.7 3.3 VDDA V IDD(REG)(3V3) regulator supply current (3.3 V) active mode; code while(1){} executed from flash; all peripherals disabled; PCLK = CCLK 8 CCLK = 12 MHz; PLL disabled [4][5] -7 -mA CCLK = 100 MHz; PLL enabled [4][5] -42 -mA CCLK = 100 MHz; PLL enabled (LPC1759) [4][6] 50 CCLK = 120 MHz; PLL enabled (LPC1759) [4][6] -67 -mA Sleep mode [4][7] -2 -mA Deep sleep mode [4][8] -240 - A Power-down mode [4][8] -31 - A Deep power-down mode; RTC running [9] -630 -nA IBAT battery supply current Deep power-down mode; RTC running VDD(REG)(3V3) present [10] -530 -nA VDD(REG)(3V3) not present [11] - 1.1 - A IDD(IO) I/O supply current Deep sleep mode [12] -40 -nA Power-down mode [12] -40 -nA Deep power-down mode [12] -10 -nA |
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