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LPC2926 Datasheet(PDF) 39 Page - NXP Semiconductors |
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LPC2926 Datasheet(HTML) 39 Page - NXP Semiconductors |
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39 / 95 page ![]() LPC2926_27_29 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 5 — 28 September 2010 39 of 95 NXP Semiconductors LPC2926/2927/2929 ARM9 microcontroller with CAN, LIN, and USB Figure 8 provides an overview of the MSCSS. An AHB-to-APB bus bridge takes care of communication with the AHB system bus. Two internal timers are dedicated to this subsystem. MSCSS timer 0 can be used to generate start pulses for the ADCs and the first PWM. The second timer (MSCSS timer 1) is used to generate ‘carrier’ signals for the PWMs. These carrier patterns can be used, for example, in applications requiring current control. Several other trigger possibilities are provided for the ADCs (external, cascaded or following a PWM). The capture inputs of both timers can also be used to capture the start pulse of the ADCs. The PWMs can be used to generate waveforms in which the frequency, duty cycle and rising and falling edges can be controlled very precisely. Capture inputs are provided to measure event phases compared to the main counter. Depending on the applications, these inputs can be connected to digital sensor motor outputs or digital external signals. Interrupt signals are generated on several events to closely interact with the CPU. The ADCs can be used for any application needing accurate digitized data from analog sources. To support applications like motor control, a mechanism to synchronize several PWMs and ADCs is available (sync_in and sync_out). Note that the PWMs run on the PWM clock and the ADCs on the ADC clock, see Section 6.16.2. |
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