L3G4200D datasheet(25/42 Pages) STMICROELECTRONICS

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L3G4200D

Digital interfaces

Doc ID 17116 Rev 3

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The SPI read command is performed with 16 clock pulses. A multiple byte read command is

performed by adding blocks of 8 clock pulses to the previous one.

Bit 0: READ bit. The value is 1.

Bit 1: MS bit. When 0, do not increment address; when 1, increment address in multiple

reading.

Bit 2-7: address AD(5:0). This is the address field of the indexed register.

Bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).

Bit 16-... : data DO(...-8). Further data in multiple byte reading.

Figure 15.

Multiple byte SPI read protocol (2-byte example)

5.2.2

SPI write

Figure 16.

SPI write protocol

The SPI write command is performed with 16 clock pulses. A multiple byte write command is

performed by adding blocks of 8 clock pulses to the previous one.

Bit 0: WRITE bit. The value is 0.

Bit 1: MS bit. When 0, do not increment address; when 1, increment address in multiple

writing.

Bit 2 -7: address AD(5:0). This is the address field of the indexed register.

Bit 8-15: data DI(7:0) (write mode). This is the data that is written to the device (MSb first).

Bit 16-... : data DI(...-8). Further data in multiple byte writing.

SPC

SDI

SDO

DO7DO6 DO5DO4 DO3DO2 DO1DO0

AD5 AD4 AD3 AD2 AD1 AD0

DO15DO14DO13DO12DO11DO10DO9 DO8

SPC

SDI

DI7

DI6

DI5

DI4

DI3

DI2

DI1

DI0

AD5 AD4 AD3 AD2 AD1 AD0

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