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978-250-3343 tel • 978-250-3373 fax • Order On-line at www.hittite.com

Application Support: apps@hittite.com

Application Schematic

HMC860LP3E

v01.0811

QUAD LOW NOISE HIGH PSRR

LINEAR VOLTAGE REGULATOR

The specified noise performance requires the 1µF decoupling capacitor between pins REF and GND (C1) and the

100nF capacitors connected between output VRx (x=1,2,3,4) and the respective RDx pin (C2, C3, C4 and C5). If noise

performance is not critical for a particular output, the 100nF capacitor can be omitted for the respective regulator. In

this case, noise spectral density will typically increase by a factor of 20X at 10kHz. The 1µF REF capacitor causes a

25ms typical turn-on start-up time.

Stability

Two approaches are recommended to manage the stability of the high-current regulators VR1 and VR4. If only one

decoupling capacitor is used at the output, the capacitor series resistance Resr must be between 0.2 Ohm and 2 Ohm

to insure stability across all loading conditions. This is shown at output VR4 in the application schematic. Note that

ceramic capacitors typically have much lower Resr (as low as 0.02 Ohm at resonance) hence they will need a series

resistor to insure stability.

In the case when several capacitors are connected at the output (which is often the case with noise and spurious

sensitive circuits), an alternate approach is to insert a small resistor in series with the load but after the 100nF feed-

back capacitor. This is shown by Rs1 at the VR1 output in the application schematic. The minimum resistor value is

0.1 Ohm, while the maximum value is set by the acceptable output voltage drop.

Due to the lower current, regulators VR2 and VR3 do not have special stability requirements. Typical 10µF ceramic

capacitor ESR of 0.02 Ohm is sufficient for their stability.