HT71D02 datasheet(4/11 Pages) HOLTEK

4 / 11 page

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

VDD

Conditions

Inverter 0 (INT) Schmitt Trigger Window

VSW

(note)

¾ VIN=24V

-20%

13.7

+20%

-20%

7.16

+20%

¾ VIN=10V

-20%

5.83

+20%

-20%

3.07

+20%

Inverter 0 (INT) Schmitt Trigger Window

VOUT

LDO Output Voltage

3.3V

VIN=10V, IOUT=10mA

3.201

3.300

3.399

5.0V

4.850

5.000

5.150

IOUT

LDO Output Current

VIN=10V,

DVOUT=3%

(Note1)

¾¾

DVLOAD Load Regulation

VIN=10V,

1mA

£IOUT£30mA

100

DVLINE

Line Regulation

¾ IOUT=1mA, 10V£VIN£24V

0.2

%/V

tSU

Startup Time

(Falling Egde of CE to VOUT

Within Specification)

VIN=10V, IOUT=10mA,

CL=10

3.3

5.0

VIN=10V, IOUT=10mA,

CL=0.1

700

1400

Temperature Coefficient

3.3V I

OUT=10mA,

-40

°C<Ta<+85°C

¾±0.50

mV/

°C

5.0V

¾±0.75

mV/

°C

Voltage Detector

VDET

Detection Voltage

¾ VLVD=9.0V

VLVD-0.3

VLVD

VLVD+0.3

VHYS

Hysteresis Width

¾¾

0.05

VDET

Temperature Coefficient

¾ -40°C<Ta<+85°C

¾±0.9

mV/

°C

Comparator

tRES

Response Time

¾¾

VHC

hysteresis Window

¾¾

0.15

VCOM

Common-Mode Input Range

¾¾

VSS+1.5

VIN-1

Note:

DVOUT is calculated as the difference between the output voltage under testing and the output voltage which

is measured at IOUT =10mA.

2. VIO specification is design guaranteed.

Rev. 1.00

June 30, 2010

HT71D02/HT71D04

Power Line Data Transceiver

, V O U T

, T a

, V D E T

, T a

HT71D02 Datasheet(PDF) 4 Page - Holtek Semiconductor Inc

HT71D02 Datasheet(HTML) 4 Page - Holtek Semiconductor Inc

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