| Electronic Components Datasheet Search |
|
PSMN3R5-30LL Datasheet(PDF) 2 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PSMN3R5-30LL Datasheet(HTML) 2 Page - NXP Semiconductors |
|
2 / 15 page ![]() PSMN3R5-30LL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 4 — 12 December 2011 2 of 15 NXP Semiconductors PSMN3R5-30LL N-channel DFN3333-8 30 V 3.6 m Ω logic level MOSFET 2. Pinning information 3. Ordering information QG(tot) total gate charge VGS =4.5 V; ID =15A; VDS =15 V; see Figure 14; see Figure 15 -18 -nC VGS =10V; ID =15A; VDS =15V; see Figure 14; see Figure 15 -37 -nC Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy VGS =10V; Tj(init) =25°C; ID =40A; Vsup ≤ 30 V; unclamped; RGS =50 Ω --118 mJ Table 1. Quick reference data …continued Symbol Parameter Conditions Min Typ Max Unit Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1S source SOT873-1 (DFN3333-8) 2S source 3S source 4 G gate 5,6,7,8 D drain mb D mounting base; connected to drain 1 234 8 765 Transparent top view S D G mbb076 Table 3. Ordering information Type number Package Name Description Version PSMN3R5-30LL DFN3333-8 plastic thermal enhanced very thin small outline package; no leads; 8 terminals SOT873-1 |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |