ZXLD1371QESTTC datasheet(6/42 Pages) DIODES

6 / 42 page

ZXLD1371

Document number: DS35436 Rev. 1 - 2

6 of 42

www.diodes.com

February 2012

A Product Line of

Diodes Incorporated

Electrical Characteristics (cont.) (Test conditions: VIN = VAUX = 12V, TA = 25°C, unless otherwise specified.)

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Output Parameters

VFLAGL

FLAG pin low level output voltage

Output sinking 1mA

0.5

IFLAGOFF FLAG pin open-drain leakage current

VFLAG = 40V

µA

VSTATUS

STATUS Flag no-load output voltage

(Note 10)

Normal operation

4.2

4.5

4.8

Out of regulation (VSHP out of range)

(Note 11)

3.3

3.6

3.9

VIN under-voltage (VIN < UVLO)

3.3

3.6

3.9

Switch stalled (tON or tOFF > 100µs)

3.3

3.6

3.9

Over-temperature (TJ > 125°C)

1.5

1.8

2.1

Excess sense resistor current

(VSENSE > 0.32V)

0.6

0.9

1.2

RSTATUS Output impedance of STATUS output

Normal operation

Ω

Driver output (PIN GATE)

VGATEH

High level output voltage

No load Sourcing 1mA

(Note 12)

VGATEL

Low level output voltage

Sinking 1mA, (Note 13)

0.5

VGATECL High level GATE CLAMP voltage

VIN = VAU X= VISM = 18V

IGATE = 1mA

12.8

IGATE

Dynamic peak current available during

rise or fall of output voltage

Charging or discharging gate of

external switch with QG = 10nC and

400kHz

±300

tSTALL

Time to assert ‘STALL’ flag and

warning on STATUS output

(Note 14)

GATE low or high

100

170

µs

LED Thermal control circuit (TADJ) parameters

VTADJH

Upper threshold voltage

Onset of output current reduction

(VTADJ falling)

560

625

690

VTADJL

Lower threshold voltage

Output current reduced to <10% of

set value (VTADJ falling)

380

440

500

ITADJ

TADJ pin Input current

VTADJ = 1.25V

µA

Notes:

10. In the event of more than one fault/warning condition occurring, the higher priority condition will take precedence.

For example ‘Excessive coil current’ and ‘Out of regulation’ occurring together will produce an output of 0.9V on the STATUS pin.

These STATUS pin voltages apply for an input voltage to VIN of 7.5V < VIN < 60V. Below 7.5V the STATUS pin voltage levels reduce and

therefore may not report the correct status. For 5.4V < VIN < 7.5V the flag pin still reports any error by going low. At low VIN in Boost and

Buck-boost modes an over-current status may be indicated when operating at high boost ratios – this due to the feedback loop increasing

the sense voltage.

For more information see the Application Information section about Flag/Status levels.

11. Flag is asserted if VSHP < 1.5V or VSHP > 2.5V

12. GATE is switched to the supply voltage VAUX for low values of VAUX (5V ≤ VAUX ≤ ~12V). For VAUX > 12V, GATE is clamped internally to prevent

it exceeding 15V.

13. GATE is switched to PGND by an NMOS transistor

14. If tON exceeds tSTALL, the device will force GATE low to turn off the external switch and then initiate a restart cycle. During this phase, ADJ is

grounded internally and the SHP pin is switched to its nominal operating voltage, before operation is allowed to resume. Restart cycles will be

repeated automatically until the operating conditions are such that normal operation can be sustained. If tOFF exceeds tSTALL, the switch will

remain off until normal operation is possible.

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