MPL3115A2

Sensors

Freescale Semiconductor, Inc.

23

7.1.3

OUT_P_MSB (0x01), OUT_P_CSB (0x02), OUT_P_LSB (0x03), OUT_T_MSB (0x04),

OUT_T_LSB (0x05)

The Altitude data is arranged as 20-bit 2’s complement value in meters. The data is stored as meters with the 16 bits of

OUT_P_MSB and OUT_P_CSB and with fractions of a meter stored in bits 7-4 of OUT_P_LSB. Be aware that the fractional bits

are not signed, therefore, they are not represented in 2’s complement.

The Pressure data is arranged as 20-bit unsigned data in Pascals. The first 18 bits are located in OUT_P_MSB, OUT_P_CSB

and bits 7-6 of OUT_P_LSB. The 2 bits in position 5-4 of OUT_P_LSB represent the fractional component.

When RAW bit is set (CTRL_REG1), then the RAW value is stored in all 24 bits of OUT_P_MSB, OUT_P_CSB and

OUT_P_LSB.

The Temperature data is arranged as 12-bit 2’s complement value in degrees C. The 8 bits of OUT_T_MSB representing de-

grees and with fractions of a degree are stored in 4 bits in position 7-4 of OUT_T_LSB. Be aware that the fractional bits are not

signed, therefore, they are not represented in 2’s complement. When RAW is selected then the RAW value is stored in all 16 bits

of OUT_T_MSB and OUT_T_LSB.

The sample data output registers store the current sample data if the FIFO data output register driver is disabled, but if the

FIFO data output register driver is enabled, the sample data output registers point to the head of the FIFO buffer which contains

the previous Pressure/Altitude and Temperature data samples.

7.1.3.1

Data Registers with F_MODE = 00

The DR_STATUS register, OUT_P_MSB, OUT_P_CSB, OUT_P_LSB, OUT_T_MSB, and OUT_T_LSB are stored in the auto-

incrementing address range of 0x00 to 0x05. This allows the host controller to read the status register followed by the 20-bit Pres-

If the FIFO data output register driver is enabled (F_MODE > 00), register 0x01 points to the FIFO read pointer, while registers

0x02, 0x03, 0x04, 0x05, return a value of zero when read.

Table 14. OUT_P_MSB Register

7

6543210

R

PD19

PD18

PD17

PD16

PD15

PD14

PD13

PD12

W

Reset

00000000

Table 15. OUT_P_CSB Register

7

6543

210

R

PD11

PD10

PD9

PD8

PD7

PD6

PD5

PD4

W

Reset

00000

000

Table 16. OUT_P_LSB Register

7

6543

21

0

R

PD3

PD2

PD1

PD0

0

0

0

0

W

Reset

00000

00

0

Table 17. OUT_T_MSB Register

7

654

32

10

R

TD11

TD10

TD9

TD8

TD7

TD6

TD5

TD4

W

Reset

0

000

00

00

Table 18. OUT_T_LSB Register

7

654

32

10

RTD3

TD2

TD1

TD0

0

0

0

0

W

Reset

0

000

00

00