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CY7C09349AV-9AXC Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY7C09349AV-9AXC
Description  3.3 V 4 K/8 K 횞 18 Synchronous Dual Port Static RAM
PDF  20 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C09349AV-9AXC Datasheet(HTML) 3 Page - Cypress Semiconductor

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CY7C09349AV
CY7C09359AV
Document Number: 001-63888 Rev. *A
Page 3 of 20
Contents
PPin Configuration .......................................................... 4
Selection Guide ................................................................ 4
Pin Definitions .................................................................. 5
Maximum Ratings ............................................................. 5
Operating Range............................................................... 5
Electrical Characteristics................................................. 6
Capacitance ...................................................................... 6
AC Test Loads .................................................................. 6
Switching Characteristics................................................ 7
Switching Waveforms ...................................................... 8
Read Cycle for Flow-through
Output (FT/PIPE = VIL) ........................................................... 8
Read Cycle for Pipelined
Operation (FT/PIPE = VIH)........................................... 8
Bank Select Pipelined Read .................................................. 9
Left Port Write to Flow-through Right Port Read............ 9
Pipelined Read-to-Write-to-Read (OE = VIL) ............... 10
Pipelined Read-to-Write-to-Read (OE Controlled) ..... 10
Flow-through Read-to-Write-to-Read (OE = VIL) ...... 11
Flow-through Read-to-Write-to-Read
(OE Controlled)......................................................................... 11
Pipelined Read with Address Counter Advance......... 12
Flow-through Read with Address Counter Advance .. 12
Write with Address Counter Advance (Flow-through or
Pipelined Outputs) ............................................................. 13
Counter Reset (Pipelined Outputs............................. )14
Read/Write and Enable Operatio.................................. n15
Address Counter Control Operation.............................. 15
Ordering Information...................................................... 16
4 K × 18 3.3 V Synchronous Dual-Port SRAM.......... 16
8 K × 18 3.3 V Synchronous Dual-Port SRAM.......... 16
Ordering Code Definitions ......................................... 16
Package Diagram............................................................ 17
Acronyms ........................................................................ 18
Document Conventions ................................................. 18
Units of Measure ....................................................... 18
Document History Page ................................................. 19
Sales, Solutions, and Legal Information ...................... 20
Worldwide Sales and Design Support....................... 20
Products .................................................................... 20
PSoC Solutions ......................................................... 20



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