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HC4052 Datasheet(PDF) 4 Page - System Logic Semiconductor |
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HC4052 Datasheet(HTML) 4 Page - System Logic Semiconductor |
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4 / 9 page ![]() SL74HC4052 System Logic Semiconductor SLS AC ELECTRICAL CHARACTERISTICS(C L=50pF,Input t r=tf=6.0 ns) VCC Guaranteed Limit Symbol Parameter V 25 °C to -55 °C ≤85°C ≤125°C Unit tPLH, tPHL Maximum Propagation Delay, Channel-Select to Analog Output (Figures 8 and 9) 2.0 4.5 6.0 370 74 63 465 93 79 550 110 94 ns tPLH, tPHL Maximum Propagation Delay , Analog Input to Analog Output (Figures 10 and 11) 2.0 4.5 6.0 60 12 10 75 15 13 90 18 15 ns tPLZ, tPHZ Maximum Propagation Delay , Enable to Analog Output (Figures 12 and 13) 2.0 4.5 6.0 290 58 49 364 73 62 430 86 73 ns tPZL, tPZH Maximum Propagation Delay , Enable to Analog Output (Figures 12 and 13) 2.0 4.5 6.0 345 69 59 435 87 74 515 103 87 ns CIN Maximum Input Capacitance, Channel-Select or Enable Inputs - 10 10 10 pF CI/O Maximum Capacitance Analog I/O All Switches Off - 35 35 35 pF Common O/I - 80 80 80 Feedthrough - 1.0 1.0 1.0 Power Dissipation Capacitance (Per Package) (Figure 15) Typical @25 °C,V CC=5.0 V, VEE=0 V CPD Used to determine the no-load dynamic power consumption: PD=CPDVCC 2f+I CCVCC 80 pF |
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