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CY74FCT163374CPVC/PVCT Datasheet(PDF) 1 Page - Texas Instruments |
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CY74FCT163374CPVC/PVCT Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 10 page  16-Bit Registers CY74FCT163374 CY74FCT163H374 SCCS050 - March 1997 - Revised March 2000 Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. Copyright © 2000, Texas Instruments Incorporated Features • Low power, pin-compatible replacement for LCX and LPT families • 5V tolerant inputs and outputs • 24 mA balanced drive outputs • Power-off disable outputs permits live insertion • Edge-rate control circuitry for reduced noise • FCT-C speed at 5.2 ns • Latch-up performance exceeds JEDEC standard no. 17 • Typical output skew < 250 ps • Industrial temperature range of –40˚C to +85˚C • TSSOP (19.6-mil pitch) or SSOP (25-mil pitch) • Typical Volp (ground bounce) performance exceeds Mil Std 883D •VCC = 2.7V to 3.6V • ESD (HBM) > 2000V CY74FCT163H374 • Bus hold on data inputs • Eliminates the need for external pull-up or pull-down resistors • Devices with bus hold are not recommended for trans- lating rail-to-rail CMOS signals to 3.3V logic levels Functional Description These devices are 16-bit D-type registers designed for use as buffered registers in high-speed, low power bus applications. These devices can be used as two independent 8-bit registers or as a single 16-bit register by connecting the output Enable (OE) and Clock (CLK) inputs. The outputs are 24-mA balanced output drivers with current limiting resistors to reduce the need for external terminating resistors, and provide for minimal undershoot and reduced ground bounce. Flow-through pinout and small shrink packaging aid in simplifying board layout. The CY74FCT163H374 has “bus hold” on the data inputs, which retains the input’s last state whenever the source driving the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs. The CY74FCT163374 is designed with inputs and outputs capable of being driven by 5.0V buses, allowing its use in mixed voltage systems as a translator. The outputs are also designed with a power off disable feature enabling its use in applications requiring live insertion. Lite Drive is a trademark of Cypress Semiconductor Corporation. Logic Block Diagrams CY74FCT163374, CY74FCT163H374 Pin Configuration D C 1OE 1CLK 1D1 1O1 TO 7 OTHER CHANNELS D C 2OE 2CLK 2D1 2O1 GND 1 2 3 4 5 6 7 8 9 10 11 12 33 32 31 30 29 25 26 27 28 36 35 1OE 34 SSOP/TSSOP Top View 13 14 15 16 17 18 19 20 21 22 23 24 45 44 43 42 41 37 38 39 40 48 47 46 1O1 1O2 1O3 1O4 1D1 1D2 1D3 1D4 1CLK GND GND VCC 1O7 1O8 1O5 1O6 1D5 1D6 1D7 1D8 VCC GND GND 2O3 2O4 2O1 2O2 2D1 2D2 2D3 2D4 GND GND VCC 2O7 2O8 2O5 2O6 2D5 2D6 2D7 2D8 VCC GND 2OE 2CLK TO 7 OTHER CHANNELS |
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