Application information

STGIPN3H60

16/21

Doc ID 018957 Rev 3

5.1

Recommendations

●

Input signal HIN is active high logic. An 85 k

Ω (typ.) pull-down resistor is built-in for

each high side input. If an external RC filter is used for noise immunity, attention should

be given to the variation of the input signal level.

●

Input signal LIN is active low logic. A 720 k

Ω (typ.) pull-up resistor, connected to an

internal 5 V regulator through a diode, is built-in for each low side input.

●

To prevent input signal oscillation, the wiring of each input should be as short as

possible.

●

By integrating an application-specific type HVIC inside the module, direct coupling to

the MCU terminals without an opto-coupler is possible.

●

Each capacitor should be located as close as possible to the pins of the IPM.

●

Low inductance shunt resistors should be used for phase leg current sensing.

●

Electrolytic bus capacitors should be mounted as close to the module bus terminals as

possible. Additional high frequency ceramic capacitors mounted close to the module

pins will further improve performance.

●

The SD/OD signal should be pulled up to 5 V / 3.3 V with an external resistor (see

Section 4: Smart shutdown function for detailed info).

Note:

For further details refer to AN4043.

Table 14.

Recommended operating conditions

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

Supply voltage

Applied between P-Nu,

Nv, Nw

300

500

V

Control supply voltage

GND

13.5

15

18

V

High side bias voltage

13

18

V

Blanking time to prevent

Arm-short

For each input signal

1.5

µs

PWM input signal

25

kHz

Case operation temperature

100

°C