TDA7718N datasheet(23/40 Pages) STMICROELECTRONICS

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TDA7718N

Description of the audioprocessor

Doc ID 16502 Rev 1

23/40

4.9

Softstep control

In this device, the softstep function is available for volume, speaker, loudness, treble, middle

and bass block. With softstep function, the audible noise of DC offset or the sudden change

of signal can be avoided when adjusting gain setting of the block.

For each block, the softstep function is controlled by softstep on/off control bit in the control

table. The softstep transient time selection (5 ms or 10 ms) is common for all blocks and it is

controlled by softstep time control bit. The softstep operation of all blocks has a common

centralized control. In this case, a new softstep operation can not be started before the

completion previous softstep.

There are two different modes to activate the softstep operation. The softstep operation can

be started right after I2C data sending, or the softstep can be activated in parallel after data

sending of several different blocks. The two modes are controlled by the ‘act bit’ (it is

normally bit7 of the byte.) of each byte. When act bit is ‘0’, which means action, the softstep

is activated right after the date byte is sent. When the act bit is ‘1’, which means wait, the

block goes to wait for softstep status. In this case, the block will wait for some other block to

activate the operation. The softstep operation of all blocks in wait status will be done

together with the block which activate the softstep. With this mode, all specific blocks can do

the softstep in parallel. This avoids waiting when the softstep is operated one by one.

↑ Softstep start here

↑ Softstep start

here for all

4.10

DC offset detector

Using the DC offset detection circuit (Figure 18) an offset voltage difference between the

audio power amplifier and the APR's Front and Rear outputs can be detected, preventing

serious damage to the loudspeakers. The circuit compares whether the signal crosses the

zero level inside the audio power at the same time as in the speaker cell. The output of the

zero-window-comparator of the power amplifier must be connected with the WinIn-input of

the APR. The WinIn-input has an internal pull-up resistor connected to 5.5 V. It is

recommended to drive this pin with open-collector outputs only.

To compensate for errors at low frequencies the WinTC-pin are implemented, with external

capacitors introducing the same delay

τ = 7.5 kΩ * C

ext as the AC-coupling between the

APR and the power amplifier introduces. For the zero window comparators, the time

constant for spike rejection as well as the threshold are programmable.

For electrical characteristics see Chapter 3 on page 9.

A low-active DC-offset error signal appears at the DCErr output if the next conditions are

both true:

Front and rear outputs are inside zero crossing windows.

The Input voltage VWinIn is logic low whenever at least one output of the power

amplifier is outside the zero crossing windows.

Chip Addr

Sub Addr

0xxxxxxx

Chip Addr

Sub Addr

1xxxxxxx

......

0xxxxxxx

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