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CXP82220/82224

Input mode

Output mode

Input mode

Output mode

SCK0 input mode

SCK0 output mode

SCK0 input mode

SCK0 output mode

SCK0 input mode

SCK0 output mode

Chip select transfer mode

(SCK0 = output mode)

Chip select transfer mode

(SCK0 = output mode)

Chip select transfer mode

Chip select transfer mode

Chip select transfer mode

Note 1)

= "11")

Note 2) The load condition for the SCK0 output mode, SO0 output delay time is 50pF + 1TTL.

(2) Serial transfer (CH0)

Item

CS0

↓ → SCK0

delay time

CS0

↑ → SCK0

float delay time

CS0

↓ → SO0

delay time

CS0

↑ → SO0

float delay time

CS0 High level width

SCK0

cycle time

SCK0

High, Low level width

SI0 input setup time

(for SCK0

↑)

SI0 input hold time

(for SCK0

↑)

SCK0

↓ → SO0

delay time

SCK0

SCK0

SO0

SO0

CS0

SCK0

SCK0

SI0

SI0

SO0

ns

ns

ns

ns

ns

Symbol

Pin

Min.

2

16000/fc

8000/fc – 50

100

200

100

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

100

Max.

Unit

Condition

TEX

EC0

EC1

Fig. 3. Event count clock timing