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STV6120 Datasheet(PDF) 2 Page - STMicroelectronics

Part # STV6120
Description  8PSK/QPSK low-power 3.3-V dual wide-band satellite tuner IC
PDF  4 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STV6120 Datasheet(HTML) 2 Page - STMicroelectronics

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Introduction
STV6120
2/4
Doc ID 022527 Rev 1
1
Introduction
The STV6120 dual tuner has four identical wideband RF inputs. The switch matrix 4:2
allows the selection of the appropriate RF input for each down-conversion path. After the
matrix, there is a high-frequency low-pass filter followed by two down mixers. Each mixer,
which down-converts the signal to baseband, is followed by a low-pass filter and amplifying
stages. The baseband gain can be varied by programming a register through the I2C bus.
The local oscillator signals are provided by two integrated fractional-N PLLs. Each PLL
contains an on-chip voltage controlled oscillator, which meets stringent phase noise
requirements. The PLL loop filters are partially integrated. The local oscillator frequencies
are programmable between 250 and 2150 MHz.
The comparison frequency for the phase-frequency detector is generated by dividing the
crystal oscillator reference frequency. The crystal frequency will be in the range 16 MHz
to 30 MHz depending on the application.
The design of the STV6120 has been carefully implemented to avoid the problems
associated with having two tuners integrated on a single chip.
Features
Benefits
Quad tuner inputs
Fits universal quad and Quattro LNB requirements
or if fewer inputs are used, very high isolation
4:2 switch matrix
Low-cost, high-performance BoM integration
allowing flexibility between legacy systems and
SCR (unicable) systems
Single flexible Xtal
Wide choice of crystal frequencies with robust
clock buffer to drive second tuners and
demodulators allowing eBoM savings
Fine-grained power management
Allows power savings and settings optimized for
actual use conditions
Wide input frequency range
Allows flexible and novel frequency planning and in
some cases BoM cost optimization
Intrinsic performance
Excellent compromise between linearity and noise
figure allowing the most difficult signals to be
extracted in the most congested and noisy
conditions
Fractional-N PLL
Low phase noise for low packet error rate under
extreme conditions (e.g., low symbol rates), fast
locking



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