CXP87940 datasheet(5/28 Pages) SONY

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CXP87940/87948

PG0/CFG

PG1/DFG

PG2/DPG

PG3/PBCTL

PG4/SYNC0

PG5/SYNC1

PG6/EXI0

PG7/EXI1

PH0 to PH7

PI1/RMC

PI2/PWM

PI3/TO/

DDO/ADJ

PI4/INT1/

NMI

PI5/SCK1

PI6/SO1

PI7/SI1

PJ0 to PJ7

EXTAL

XTAL

TEX

RST

AVDD

AVREF

AVss

VDD

Vss

Input/Input

Output

I/O/Input

I/O/Output

I/O/Output/

Output/Output

I/O/Input/Input

I/O/I/O

I/O/Output

I/O/Input

I/O

Input

Output

Input

Output

Input

Composite sync signal input.

(2 pins)

External input to FRC capture unit.

(2 pins)

(Port G)

8-bit input port.

(8 pins)

(Port H)

8-bit output port. N-ch open drain output of medium drive voltage (12V)

and large current (12mA).

(8 pins)

Remote control reception circuit input.

14-bit PWM output.

Timer/counter, CTL duty detection, 32kHz oscillation

adjustment output.

Input to request external interruption and

non-maskable interruption. Active at the falling edge.

Serial clock (CH1) I/O.

Serial data (CH1) output.

Serial data (CH1) input.

(Port I)

7-bit I/O port.

I/O port can be

set in a unit of

single bits.

(7 pins)

(Port J)

8-bit I/O port. I/O and standby release input function can be set in a

unit of single bits.

Connects a crystal oscillator for system clock. When supplying the

external clock, input the external clock to EXTAL and input the

opposite phase clock to XTAL .

Connects a crystal oscillator for 32kHz timer/counter clock. The 32kHz

crystal oscillator is inserted between TEX and TX. When used as event

input, connect the clock source to TEX and leave TX open.

System reset; active at Low level.

Test mode input. Always connect to GND.

Positive power supply of A/D converter.

Reference voltage input of A/D converter.

GND of A/D converter.

Positive power supply. Connect VDD pin to VDD.

No connected. Connect to VDD in normal operation.

GND. Connect both Vss pins to GND.

Symbol

I/O

Description

Capstan FG input.

Drum FG input.

Drum PG input.

Playback CTL pulse input.

External event input for timer/counter.

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