Production Data

WM8523

w

PD, Rev 4.1, August 2011

35

REGISTER MAP

The complete register map is shown below. The detailed description can be found in the relevant text of the device description. The WM8523 can be configured using the Control Interface. All

unused bits should be set to '0' and access to unlisted registers should be avoided.

REG

NAME

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

DEFAULT

R0 (0h)

DEVICE_ID /

SW RESET

CHIP_ID[15:0]

8523h

R1 (1h)

REVISION

0

0

0

0

0

0

0

0

0

0

0

0

0

CHIP_REV[2:0]

0000h

R2 (2h)

PSCTRL1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

SYS_ENA[1:0]

0000h

R3 (3h)

AIF_CTRL1

0

0

0

0

0

0

0

DAC_

DEEMP

AIF_

MSTR

AIF_

LRCLK_

INV

AIF_

BCLK_

INV

AIF_WL[1:0]

0

AIF_FMT[1:0]

1812h

R4 (4h)

AIF_CTRL2

0

0

0

0

0

0

0

0

DAC_OP_MUX[1:0]

AIF_BCLKDIV[2:0]

AIF_SR[2:0]

0000h

R5 (5h)

DAC_CTRL3

0

0

0

0

0

0

0

0

0

0

0

DAC_ZC

DACR_

MUTE

DACL_

MUTE

DAC_

VOL_

UP_

RAMP

DAC_

VOL_

DOWN_

RAMP

0001h

R6 (6h)

DAC_GAINL

0

0

0

0

0

0

DACL_

VU

DACL_VOL[8:0]

0190h

R7 (7h)

DAC_GAINR

0

0

0

0

0

0

DACR_

VU

DACR_VOL[8:0]

0190h

R8 (8h)

ZERO_DETECT

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

ZD_

COUNT

0000h

Table 24 Register Map