ACT8600 datasheet(13/50 Pages) ACTIVE-SEMI

13 / 50 page

ACT8600

Rev 3, 15-Nov-12

Innovative Power

ActivePMU

TM and ActivePathTM are trademarks of Active-Semi.

2CTM is a trademark of NXP.

- 13 -

www.active-semi.com

OUTPUT

ADDRESS

BIT

NAME

ACCESS

DESCRIPTION

REG7

0x70

[7:6]

Reserved.

REG7

0x70

[5:0]

VSET

R/W

Output Voltage Selection. See the Output Voltage

Programming

section for more information.

REG7

0x71

[7]

R/W

Regulator Enable Bit. Set bit to 1 to enable the regulator,

clear bit to 0 to disable the regulator.

REG7

0x71

[6:3]

Reserved.

REG7

0x71

[2]

DIS

R/W

Output Discharge Control. When activated, LDO output is

discharged to GA through 1.5kΩ resistor when in shutdown.

Set bit to 1 to enable output voltage discharge in shutdown,

clear bit to 0 to disable this function.

REG7

0x71

[1]

nFLTMSK

R/W

Regulator Fault Mask Control. Set bit to 1 enable fault-

interrupts, clear bit to 0 to disable fault-interrupts.

REG7

0x71

[0]

Regulator Power-OK Status. Value is 1 when output voltage

exceeds the power-OK threshold, value is 0 otherwise.

REG8

0x80

[7:6]

Reserved.

REG8

0x80

[5:0]

VSET

R/W

Output Voltage Selection. See the Output Voltage

Programming

section for more information.

REG8

0x81

[7]

R/W

Regulator Enable Bit. Set bit to 1 to enable the regulator,

clear bit to 0 to disable the regulator.

REG8

0x81

[6:3]

Reserved.

REG8

0x81

[2]

DIS

R/W

Output Discharge Control. When activated, LDO output is

discharged to GA through 1.5kΩ resistor when in shutdown.

Set bit to 1 to enable output voltage discharge in shutdown,

clear bit to 0 to disable this function.

REG8

0x81

[1]

nFLTMSK

R/W

Regulator Fault Mask Control. Set bit to 1 enable fault-

interrupts, clear bit to 0 to disable fault-interrupts.

REG8

0x81

[0]

Regulator Power-OK Status. Value is 1 when output voltage

exceeds the power-OK threshold, value is 0 otherwise.

REG910

0x91

[7]

ON9

R/W

REG9 Enable Bit. Set bit to 1 to enable the regulator, clear bit

to 0 to disable the regulator.

REG910

0x91

[6]

ON10

R/W

REG10 Enable Bit. Set bit to 1 to enable the regulator, clear

bit to 0 to disable the regulator.

REG910

0x91

[5:0]

Reserved.

APCH

0xA1

[7]

SUSCHG

R/W

Charge Suspend Control Input. Set bit to 1 to suspend

charging, clear bit to 0 to allow charging to resume.

APCH

0xA1

[5:4]

TOTTIMO

R/W

Total Charge Time-out Selection. See the Charge Safety

Timers

section for more information.

APCH

0xA1

[3:2]

PRETIMO

R/W

Precondition Charge Time-out Selection. See the Charge

Safety Timers

section for more information.

APCH

0xA1

[1]

CHGLEV

R/W

Charge Current Selection Input. See Charge Current

Programming

Section.

APCH

0xA1

[6]

Reserved.

APCH

0xA1

[0]

OVPSET

R/W

Input Over-Voltage Protection Threshold Selection. See the

Input Over-Voltage Protection

section for more information.

APCH

0xA8

[7]

TIMRSTAT1

R/W

Charge Time-out Interrupt Status. Set this bit with

TIMRPRE[ ] and/or TIMRTOT[ ] to 1 to generate an interrupt

when charge safety timers expire, read this bit to get charge

time-out interrupt status. See the Charge Safety Timers

section for more information.

: Valid only when CHGIN UVLO Threshold<VCHGIN<CHGIN OVP Threshold.

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