MCP3901_12 datasheet(21/46 Pages) MICROCHIP

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Calculation Engine and Register Description

DS51968A-page 21

3.6

LINE_CYC

Number of line cycles as a power of two. A setting of 0 indicates 20 or one line cycle.

A setting of 1 is two line cycles (21), a setting of 2 is four lines cycles (22), up to a setting

of eight which is 256 line cycles. When written, this register will not take effect until the

previous number of line cycles has been acquired.

3.7

LINE_CYC_CNT

This register counts from 0 and finishes at 2 (LINE_CYC - 1). Then it restarts at 0, where

LINE_CYC represents the value in the LINE_CYC register.

3.8

RAW2_I_RMS

This register is the square of the raw RMS value from the current A/D converter in

LSBs. By definition, this register will always contain a positive value, including the sit-

uation where power is negative from a backwards CT or otherwise. This register is

overwritten every LINE_CYC line cycle and is written only once, if calibration is

enabled.

bit 1

CAL_UPDATE: Calibration Update bit

Power and energy registers updated for LINE_CYC line cycles when cleared. Bit must be set for reg-

isters to begin updating, which starts on the next line cycle after bit is set.

When the CAL_MODE bit is set, set the CAL_UPDATE bit to enable update of power and energy

registers starting on next line cycle. Bit = 1 Single Point Phase Correction.

When the CAL_MODE bit is set and the CAL_UPDATE bit has been set, the CAL_UPDATE bit

will be cleared after LINE_CYC line cycles. At that point, all registers will be updated and no

further updates will be done until the CAL_UPDATE bit is set again, or the CAL_MODE bit is

cleared.

bit 0

CAL_MODE: Calibration Mode bit

This bit enables Calibration mode.

Calibration mode enabled

Calibration mode disabled

Note 1:

This register is used in Multi-Point and Single-Point Calibration modes only.

Name

Bits

Cof

LINE_CYC

R/W

CAL_CONTROL REGISTER (CONTINUED)(NOTE 1)

Name

Bits

Cof

LINE_CYC_CNT

Name

Bits

Cof

RAW2_I_RMS

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