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ADP3152 Datasheet(PDF) 3 Page - Analog Devices

Part # ADP3152
Description  5-Bit Programmable Synchronous Switching Regulator Controller for Pentium II Processor
PDF  12 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP3152 Datasheet(HTML) 3 Page - Analog Devices

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ADP3152
–3–
REV. 0
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3152 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Function
1–4, 16
VID1–VID4, VD0
Voltage Identification DAC Input Pins. These pins are internally pulled up to VREG providing a
logic one if left open. Leaving all five DAC inputs open results in placing the ADP3152 into
shutdown.
5
AGND
Analog Ground Pin. This pin must be routed separately to the (–) terminal of COUT.
6
SD
Shutdown Pin. A logic high will place the ADP3152 in shutdown and disable the output. This
pin is internally pulled down.
7
SENSE–
Connects to the internal resistor divider which, along with the VID code, sets the output volt-
age. Pin 7 is also the (–) input for the current comparator.
8
SENSE+
The (+) input for the current comparator. A threshold between Pins 8 and 7 set by the error
amplifier in conjunction with RSENSE, sets the current trip point.
9CT
External Capacitor CT from Pin 9 to ground sets the off time of the device.
10
CMP
Error Amplifier Compensation Point. The current comparator threshold increases with the Pin
10 voltage.
11
PWRGD
Power Good Pin. An open drain signal to indicate that the output voltage is within a
±5% regu-
lation band.
12
VCC
Input Voltage Pin.
13
DRIVE2
Gate Drive for the bottom synchronous N-channel MOSFET. The voltage at Pin 13 swings
from ground to VCC.
14
DRIVE1
Gate Drive for the top primary N-channel MOSFET. The voltage at Pin 14 swings from ground
to VCC.
15
PGND
Driver Power Ground. Connects to the source of the bottom N-channel MOSFET and to the
(–) terminal of CIN.
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS*
Input Supply Voltage (Pin 12) . . . . . . . . . . . . –0.3 V to +16 V
VID0–VID4, SD, PWRGD, CMP, CT . . . . . . . –0.3 V to VCC
DRIVE1, DRIVE2, SENSE+, SENSE– . . . . . . –0.3 V to VCC
Operating Temperature Range . . . . . . . . . . . . . 0
°C to +70°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
°C
θ
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
°C/W
Storage Temperature Range . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300
°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
ORDERING GUIDE
Temperature Package
Package
Model
Range
Description
Option
ADP3152AR
0
°C to +70°C 16-Lead SOIC R-16A/SO-16
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VID1
VID2
VID3
VID4
AGND
SD
SENSE–
SENSE+
VID0
PGND
DRIVE1
DRIVE2
VCC
PWRGD
CMP
CT
ADP3152



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