REV. A

ADP3159/ADP3179

–13–

8.

A power Schottky diode (1 ~ 2 A dc rating) placed from the

lower MOSFET’s source (anode) to drain (cathode) will

help to minimize switching power dissipation in the upper

MOSFET. In the absence of an effective Schottky diode,

this dissipation occurs through the following sequence of

switching events. The lower MOSFET turns off in advance

of the upper MOSFET turning on (necessary to prevent

cross-conduction). The circulating current in the power

converter, no longer finding a path for current through the

channel of the lower MOSFET, draws current through the

inherent body-drain diode of the MOSFET. The upper

MOSFET turns on, and the reverse recovery characteristic

of the lower MOSFET’s body-drain diode prevents the drain

voltage from being pulled high quickly. The upper MOSFET

then conducts very large current while it momentarily has a

high voltage forced across it, which translates into added

power dissipation in the upper MOSFET. The Schottky diode

minimizes this problem by carrying a majority of the circu-

lating current when the lower MOSFET is turned off, and

by virtue of its essentially nonexistent reverse recovery time.

9.

Whenever a power-dissipating component (e.g., a power

MOSFET) is soldered to a PCB, the liberal use of vias,

both directly on the mounting pad and immediately sur-

rounding it, is recommended. Two important reasons for

this are: improved current rating through the vias (if it is

a current path), and improved thermal performance—

especially if the vias extend to the opposite side of the PCB

where a plane can more readily transfer the heat to the air.

10. The output power path, though not as critical as the switch-

ing power path, should also be routed to encompass a small

area. The output power path is formed by the current path

through the inductor, the current sensing resistor, the out-

put capacitors, and back to the input capacitors.

11. For best EMI containment, the ground plane should extend

fully under all the power components. These are: the input

capacitors, the power MOSFETs and Schottky diode, the

inductor, the current sense resistor, any snubbing elements

that might be added to dampen ringing, and the output

capacitors.

Signal Circuitry

12. The output voltage is sensed and regulated between the

GND pin (which connects to the signal ground plane) and

the CS– pin. The output current is sensed (as a voltage) and

regulated between the CS– pin and the CS+ pin. In order to

avoid differential mode noise pickup in those sensed signals,

their loop areas should be small. Thus the CS– trace should

be routed atop the signal ground plane, and the CS+ and

CS– traces should be routed as a closely coupled pair (CS+

should be over the signal ground plane as well).

13. The CS+ and CS– traces should be Kelvin-connected to

the current sense resistor so that the additional voltage drop

due to current flow on the PCB at the current sense resistor

connections does not affect the sensed voltage. It is desir-

able to have the ADP3159 close to the output capacitor

bank and not in the output power path, so that any voltage

drop between the output capacitors and the GND pin is

minimized, and voltage regulation is not compromised.