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ACT-SF41632 Datasheet(PDF) 5 Page - Aeroflex Circuit Technology

Part # ACT-SF41632
Description  ACT-SF41632 High Speed 128Kx32 SRAM / 512Kx32 Flash Multichip Module
PDF  11 Pages
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Manufacturer  AEROFLEX [Aeroflex Circuit Technology]
Direct Link  http://www.aeroflex.com
Logo AEROFLEX - Aeroflex Circuit Technology

ACT-SF41632 Datasheet(HTML) 5 Page - Aeroflex Circuit Technology

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Aeroflex Circuit Technology
SCD3851 REV A 5/21/98
Plainview NY (516) 694-6700
5
Flash AC Characteristics – Read Only Operations
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)
Parameter
Symbol
JEDEC Stand’d
–60
Min Max
–70
Min Max
–90
Min Max
Units
Read Cycle Time
tAVAV
tRC
60
70
90
ns
Address Access Time
tAVQV
tACC
60
70
90
ns
Chip Enable Access Time
tELQV
tCE
60
70
90
ns
Output Enable to Output Valid
tGLQV
tOE
30
35
35
ns
Chip Enable to Output High Z (1)
tEHQZ
tDF
20
20
20
ns
Output Enable High to Output High Z(1)
tGHQZ
tDF
20
20
20
ns
Output Hold from Address, CE or OE Change, Whichever is First
tAXQX
tOH
0
0
0
ns
Note 1. Guaranteed by design, but not tested
Flash AC Characteristics – Write / Erase / Program Operations, FWE Controlled
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)
Parameter
Symbol
JEDEC Stand’d
–60
Min Max
–70
Min Max
–90
Min Max
Units
Write Cycle Time
tAVAC
tWC
60
70
90
ns
Chip Enable Setup Time
tELWL
tCE
0
0
0
ns
Write Enable Pulse Width
tWLWH
tWP
40
45
45
ns
Address Setup Time
tAVWL
tAS
0
0
0
ns
Data Setup Time
tDVWH
tDS
40
45
45
ns
Data Hold Time
tWHDX
tDH
0
0
0
ns
Address Hold Time
tWLAX
tAH
45
45
45
ns
Write Enable Pulse Width High
tWHWL
tWPH
20
20
20
ns
Duration of Byte Programming Operation
tWHWH1
14
TYP
14
TYP
14
TYP
µs
Sector Erase Time
tWHWH2
30
30
30
Sec
Read Recovery Time before Write
tGHWL
0
0
0
µs
Vcc Setup Time
tVCE
50
50
50
µs
Chip Programming Time
50
50
50
Sec
Chip Enable Hold Time
tOEH 1
10
10
10
ns
Chip Erase Time
tWHWH3
120
120
120
Sec
1. Toggle and Data Polling only.
Flash AC Characteristics – Write / Erase / Program Operations, FCE Controlled
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)
Parameter
Symbol
JEDEC
Stand’d
–60
Min Max
–70
Min Max
–90
Min Max
Units
Write Cycle Time
tAVAC
tWC
60
70
90
ns
Write Enable Setup Time
tWLEL
tWS
0
0
0
ns
Chip Enable Pulse Width
tELEH
tCP
40
45
45
ns
Address Setup Time
tAVEL
tAS
0
0
0
ns
Data Setup Time
tDVEH
tDS
40
45
45
ns
Data Hold Time
tEHDX
tDH
0
0
0
ns
Address Hold Time
tELAX
tAH
45
45
45
ns
Chip Enable Pulse Width High
tEHEL
tCPH
20
20
20
ns
Duration of Byte Programming
tWHWH1
14
TYP
14
TYP
14
TYP
µs
Sector Erase Time
tWHWH2
30
30
30
Sec
Read Recovery Time
tGHEL
0
0
0
ns
Chip Programming Time
50
50
50
Sec
Chip Erase Time
tWHWH3
120
120
120
Sec



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