ADM1065ASUZ datasheet(4/28 Pages) AD

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ADM1065

Rev. D | Page 4 of 28

SPECIFICATIONS

VH = 3.0 V to 14.4 V1, VPx = 3.0 V to 6.0 V1, TA = −40°C to +85°C, unless otherwise noted.

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

POWER SUPPLY ARBITRATION

VH, VPx

3.0

Minimum supply required on one of VH, VPx

VPx

6.0

Maximum VDDCAP = 5.1 V typical

14.4

VDDCAP = 4.75 V

VDDCAP

2.7

4.75

5.4

Regulated LDO output

CVDDCAP

μF

Minimum recommended decoupling

capacitance

POWER SUPPLY

Supply Current, IVH, IVPx

4.2

VDDCAP = 4.75 V, PDO1 to PDO10 off

Additional Currents

All PDO FET Drivers On

VDDCAP = 4.75 V, PDO1 to PDO6 loaded with

1 μA each, PDO7 to PDO10 off

Current Available from VDDCAP

Maximum additional load that can be drawn

from all PDO pull-ups to VDDCAP

EEPROM Erase Current

1 ms duration only, VDDCAP = 3 V

SUPPLY FAULT DETECTORS

VH Pin

Input Impedance

kΩ

Input Attenuator Error

±0.05

Midrange and high range

Detection Ranges

High Range

14.4

Midrange

2.5

VPx Pins

Input Impedance

kΩ

Input Attenuator Error

±0.05

Low range and midrange

Detection Ranges

Midrange

2.5

Low Range

1.25

Ultralow Range

0.573

1.375

No input attenuation error

VXx Pins

Input Impedance

MΩ

Detection Ranges

Ultralow Range

0.573

1.375

No input attenuation error

Absolute Accuracy

±1

VREF error + DAC nonlinearity + comparator

offset error + input attenuation error

Threshold Resolution

Bits

Digital Glitch Filter

μs

Minimum programmable filter length

100

μs

Maximum programmable filter length

REFERENCE OUTPUT

Reference Output Voltage

2.043

2.048

2.053

No load

Load Regulation

−0.25

Sourcing current

0.25

Sinking current

Minimum Load Capacitance

μF

Capacitor required for decoupling, stability

PSRR

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