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S34ML01G2 Datasheet(PDF) 21 Page - SPANSION

Part # S34ML01G2
Description  1 Gb, 2 Gb, 4 Gb Densities: 4-bit ECC, x8 I/O and 3V VCC
PDF  68 Pages
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
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S34ML01G2 Datasheet(HTML) 21 Page - SPANSION

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August 3, 2012 S34ML01G2_04G2_01
Spansion
®
SLC NAND Flash Memory for Embedded
21
Da ta
Sh e e t
(Adv a n ce
In f o r m ation)
3.8
Special Read for Copy Back — S34ML02G2 and S34ML04G2
The device features the “Special Read for Copy Back.” If Copy Back Read (described in Section 3.6 and
Section 3.7 on page 20) is triggered with confirm command ‘36h’ instead ‘35h’, Copy Back Read from target
page(s) will be executed with an increased internal (VPASS) voltage.
This special feature is used in order to minimize the number of read errors due to over-program or read
disturb — it shall be used only if ECC read errors have occurred in the source page using Page Read or Copy
Back Read sequences.
Excluding the Copy Back Read confirm command, all other features described in Section 3.6 and Section 3.7
for standard copy back remain valid (including the figures referred to in those sections).
3.9
Read Status Register
The Status Register is used to retrieve the status value for the last operation issued. After writing 70h
command to the command register, a read cycle outputs the content of the Status Register to the I/O pins on
the falling edge of CE# or RE#, whichever occurs last. This two-line control allows the system to poll the
progress of each device in multiple memory connections even when R/B# pins are common-wired. Refer to
Section 3.2 on page 22 for specific Status Register definition, and to Figure 6.22 on page 49 and Figure 6.24
on page 50 for timings.
If the Read Status Register command is issued during multiplane operations then Status Register polling will
return the combined status value related to the outcome of the operation in the two planes according to the
following table:
In other words, the Status Register is dynamic; the user is not required to toggle RE# / CE# to update it.
The command register remains in Status Read mode until further commands are issued. Therefore, if the
Status Register is read during a random read cycle, the read command (00h) should be given before starting
read cycles.
3.10
Read Status Enhanced — S34ML02G2 and S34ML04G2
Read Status Enhanced is an additional feature used to retrieve the status value for a previous operation in
the case of multiplane operations on a specific plane in the same die.
Figure 6.25 on page 50 defines the Read Status Enhanced behavior and timings. The plane and die address
must be specified in the command sequence in order to retrieve the status of the die and the plane of interest.
Refer to Table 3.2 for specific Status Register definitions. The command register remains in Status Read
mode until further commands are issued.
The Status Register is dynamic; the user is not required to toggle RE# / CE# to update it.
3.11
Read Status Register Field Definition
Table 3.2 below lists the meaning of each bit of the Read Status Register and Read Status Enhanced
(S34ML02G2 and S34ML04G2).
Status Register Bit
Composite Status Value
Bit 0, Pass/Fail
OR
Bit 1, Cache Pass/Fail
OR



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