PIC12F1501 datasheet(59/422 Pages) MICROCHIP

59 / 422 page

 2011-2013 Microchip Technology Inc.

DS40001609B-page 59

PIC16(L)F1508/9

SCS<1:0> = 00:

Change the SCS bits in the OSCCON register

to select the FOSC Configuration Word clock

selection. Since the OST is not applicable with

external clocks, the clock module will

immediately switch to the external clock, and

the fail-safe condition will be cleared.

If the Fail-Safe condition still exists, the OSFIF bit will

again be set by hardware.

5.5.3.3

Secondary Oscillator with

SCS<1:0> = 01

When a Fail-Safe condition occurs with the clock switch

selected to run from the Secondary Oscillator selection

(SCS<1:0> =

01), regardless of the FOSC selection,

the condition is cleared by performing the following pro-

cedure.

SCS<1:0> = 01 (Secondary Oscillator)

SCS<1:0> = 1x:

Change the SCS bits in the OSCCON register

to select the internal oscillator block.

OSFIF = 0:

Clear the OSFIF bit in the PIR2 register.

Read SOSCR:

The OST is not used with the secondary

oscillator, therefore, the user must determine if

the secondary oscillator is ready by monitoring

the SOSCR bit in the OSCSTAT register.

When the SOSCR bit is set, the secondary

oscillator is ready.

SCS<1:0> = 01:

Change the SCS bits in the OSCCON register

to select the secondary oscillator. The clock

module will immediately switch to the

secondary oscillator and the fail-safe condition

will be cleared.

If the Fail-Safe condition still exists, the OSFIF bit will

again be set by hardware.

5.5.4

RESET OR WAKE-UP FROM SLEEP

The FSCM is designed to detect external oscillator or

external clock failures.

When FSCM is used with an external oscillator, the

Oscillator Start-up Timer (OST) count must expire

before the FSCM becomes active. The OST is used

after waking up from Sleep and after any type of Reset.

When the FSCM is used with external clocks, the OST

is not used and the FSCM will be active as soon as the

Reset or wake-up has completed.

When the FSCM is enabled, the Two-Speed Start-up is

also enabled. Therefore, the device will always be exe-

cuting code while the OST is operating.

FIGURE 5-10:

FSCM TIMING DIAGRAM

Note:

Due to the wide range of oscillator start-up

times, the Fail-Safe circuit is not active

during oscillator start-up (i.e., after exiting

Reset or Sleep).

OSFIF

System

Clock

Output

Sample Clock

Failure

Detected

Oscillator

Failure

Note:

The system clock is normally at a much higher frequency than the sample clock. The relative frequencies in

this example have been chosen for clarity.

(Q)

Test

Clock Monitor Output

PIC12F1501 Datasheet(PDF) 59 Page - Microchip Technology

PIC12F1501 Datasheet(HTML) 59 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL