PIC24FV32KA302-ISLASHML datasheet(189/364 Pages) MICROCHIP

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DS39995D-page 189

PIC24FV32KA304 FAMILY

RTCPWC: RTCC CONFIGURATION REGISTER 2(1)

R/W-0

PWCEN

PWCPOL

PWCCPRE

PWCSPRE

RTCCLK1(2)

RTCCLK0(2)

RTCOUT1

RTCOUT0

bit 15

bit 8

U-0

—

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

PWCEN: Power Control Enable bit

1 = Power control is enabled

0 = Power control is disabled

bit 14

PWCPOL: Power Control Polarity bit

1 = Power control output is active-high

0 = Power control output is active-low

bit 13

PWCCPRE: Power Control Control/Stability Prescaler bits

1 = PWC stability window clock is divide-by-2 of source RTCC clock

0 = PWC stability window clock is divide-by-1 of source RTCC clock

bit 12

PWCSPRE: Power Control Sample Prescaler bits

1 = PWC sample window clock is divide-by-2 of source RTCC clock

0 = PWC sample window clock is divide-by-1 of source RTCC clock

bit 11-10

RTCCLK<1:0>: RTCC Clock Select bits(2)

Determines the source of the internal RTCC clock, which is used for all RTCC timer operations.

00 = External Secondary Oscillator (SOSC)

01 = Internal LPRC Oscillator

10 = External power line source – 50 Hz

11 = External power line source – 60 Hz

bit 9-8

RTCOUT<1:0>: RTCC Output Select bits

Determines the source of the RTCC pin output.

00 = RTCC alarm pulse

01 = RTCC seconds clock

10 = RTCC clock

11 = Power control

bit 7-0

Unimplemented: Read as ‘0’

Note 1:

The RTCPWC register is only affected by a POR.

When a new value is written to these register bits, the Seconds Value register should also be written to

properly reset the clock prescalers in the RTCC.

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