PI7C8140AMA datasheet(3/82 Pages) PERICOM

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PI7C8140A

2-PORT PCI-TO-PCI BRIDGE

Page 3 of 82

March 20, 2007 – Revision 1.01

REVISION HISTORY

DATE

REVISION NUMBER

DESCRIPTION

11-13-2003

0.01

First Draft of Datasheet

03-04-2004

0.02

First release of datasheet

03-24-2004

0.03

Corrected reference to the retry counter register in section 2.5.3 from

offset 78h to offset 88h.

Corrected reference to the chip control register in section 2.5.4 from

offset 40h to offset 44h.

Changed/revised pin descriptions for P_CLKRUN# and

S_CLKRUN# in section 1.2.3.

Changed pin descriptions for SCAN_EN and SCAN_TM# in section

1.2.4.

Revised pin description for LOO pin in section

05-07-2004

1.00

Added Power consumption and TSKEW data

Initial release of the datasheet to the web

03-20-2007

1.01

Removed solutions@pericom.com contact information

Removed “Advance Information” from headers

PREFACE

The PI7C8140A datasheet will be enhanced periodically when updated information is available. The technical

information in this datasheet is subject to change without notice. This document describes the functionalities of

PI7C8140A and provides technical information for designers to design their hardware using PI7C8140A.

07-0067

PI7C8140AMA Datasheet(PDF) 3 Page - Pericom Semiconductor Corporation