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M68ICS08GR Datasheet(PDF) 400 Page - Freescale Semiconductor, Inc |
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M68ICS08GR Datasheet(HTML) 400 Page - Freescale Semiconductor, Inc |
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400 / 408 page ![]() Glossary Technical Data MC68HC908GR8 — Rev 4.0 400 Glossary MOTOROLA LVI — See "low voltage inhibit module (LVI)." M68HC08 — A Motorola family of 8-bit MCUs. mark/space — The logic 1/logic 0 convention used in formatting data in serial communication. mask — 1. A logic circuit that forces a bit or group of bits to a desired state. 2. A photomask used in integrated circuit fabrication to transfer an image onto silicon. mask option — A optional microcontroller feature that the customer chooses to enable or disable. mask option register (MOR) — An EPROM location containing bits that enable or disable certain MCU features. MCU — Microcontroller unit. See “microcontroller.” memory location — Each M68HC08 memory location holds one byte of data and has a unique address. To store information in a memory location, the CPU places the address of the location on the address bus, the data information on the data bus, and asserts the write signal. To read information from a memory location, the CPU places the address of the location on the address bus and asserts the read signal. In response to the read signal, the selected memory location places its data onto the data bus. memory map — A pictorial representation of all memory locations in a computer system. microcontroller — Microcontroller unit (MCU). A complete computer system, including a CPU, memory, a clock oscillator, and input/output (I/O) on a single integrated circuit. modulo counter — A counter that can be programmed to count to any number from zero to its maximum possible modulus. monitor ROM — A section of ROM that can execute commands from a host computer for testing purposes. MOR — See "mask option register (MOR)." most significant bit (MSB) — The leftmost digit of a binary number. multiplexer — A device that can select one of a number of inputs and pass the logic level of that input on to the output. N — The negative bit in the condition code register of the CPU08. The CPU sets the negative bit when an arithmetic operation, logical operation, or data manipulation produces a negative result. nibble — A set of four bits (half of a byte). Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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