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CY62156ESL Datasheet(PDF) 4 Page - Cypress Semiconductor |
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CY62156ESL Datasheet(HTML) 4 Page - Cypress Semiconductor |
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4 / 16 page ![]() CY62156ESL MoBL® Document Number: 001-54995 Rev. *D Page 4 of 16 Maximum Ratings Exceeding the maximum ratings may impair the useful life of the device. User guidelines are not tested. Storage Temperature ............................... –65 °C to + 150°C Ambient Temperature with Power Applied ........................................ –55 °C to + 125 °C Supply Voltage to Ground Potential ...............–0.5 V to 6.0 V DC Voltage Applied to Outputs in High Z State [4, 5] ........................................–0.5 V to 6.0 V DC Input Voltage [4, 5] ....................................–0.5 V to 6.0 V Output Current into Outputs (LOW) ............................ 20 mA Static Discharge Voltage (MIL-STD-883, Method 3015) ................................. > 2,001V Latch Up Current ................................................... > 200 mA Operating Range Device Range Ambient Temperature VCC[6] CY62156ESL Industrial –40 °C to +85 °C 2.2 V to 3.6 V, and 4.5 V to 5.5 V Electrical Characteristics Over the Operating Range Parameter Description Test Conditions 45 ns Unit Min Typ [1] Max VOH Output HIGH Voltage 2.2 < VCC < 2.7 IOH = –0.1 mA 2.0 – – V 2.7 < VCC < 3.6 IOH = –1.0 mA 2.4 – – 4.5 < VCC < 5.5 IOH = –1.0 mA 2.4 – – VOL Output LOW Voltage 2.2 < VCC < 2.7 IOL = 0.1 mA – – 0.4 V 2.7 < VCC < 3.6 IOL = 2.1mA – – 0.4 4.5 < VCC < 5.5 IOL = 2.1mA – – 0.4 VIH Input HIGH Voltage 2.2 < VCC < 2.7 1.8 – VCC + 0.3 V 2.7 < VCC < 3.6 2.2 – VCC + 0.3 4.5 < VCC < 5.5 2.2 – VCC + 0.5 VIL Input LOW Voltage 2.2 < VCC < 2.7 –0.3 – 0.6 V 2.7 < VCC < 3.6 –0.3 – 0.8 4.5 < VCC < 5.5 –0.5 – 0.8 IIX Input Leakage Current GND < VI < VCC –1 – +1 A IOZ Output Leakage Current GND < VO < VCC, Output Disabled –1 – +1 A ICC VCC Operating Supply Current f = fmax = 1/tRC VCC = VCCmax, IOUT = 0 mA, CMOS levels –18 25 mA f = 1 MHz – 1.8 3 ISB1 Automatic CE Power down Current – CMOS Inputs CE1 > VCC 0.2 V, CE2 < 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V, f = fmax (Address and Data Only), f = 0 (OE, BHE, BLE and WE), VCC = VCC(max) –28 A ISB2 [7] Automatic CE Power down Current – CMOS Inputs CE1 > VCC – 0.2 V or CE2 < 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V, f = 0, VCC = VCC(max) –28 A Notes 4. VIL(min) = –2.0 V for pulse durations less than 20 ns. 5. VIH(max) = VCC + 0.75 V for pulse durations less than 20 ns. 6. Full Device AC operation assumes a 100 s ramp time from 0 to VCC(min) and 200 s wait time after VCC stabilization. 7. Only chip enables (CE1 and CE2) need to be tied to CMOS levels to meet the ISB2 / ICCDR spec. Other inputs can be left floating. |
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