ADM7160ACPZN3.3-R2 datasheet(19/24 Pages) AD

19 / 24 page

Data Sheet

ADM7160

Rev. 0 | Page 19 of 24

In cases where the board temperature is known, use the ΨJB

thermal characterization parameter to estimate the junction

temperature rise (see Figure 55 and Figure 56). Maximum junc-

tion temperature (TJ) is calculated from the board temperature

(TB) and the power dissipation (PD) using the following formula:

TJ = TB + (PD × ΨJB)

(5)

The typical value of ΨJB is 43°C/W for the 5-lead TSOT package

and 28.3°C/W for the 6-lead LFCSP package.

140

120

100

0.3

4.8

4.3

3.8

3.3

2.8

2.3

1.8

1.3

0.8

VIN – VOUT (V)

ILOAD = 1mA

ILOAD = 10mA

ILOAD = 50mA

ILOAD = 100mA

ILOAD = 150mA

ILOAD = 200mA

MAXIMUM JUNCTION TEMPERATURE

Figure 55. TSOT, TA = 85°C

140

120

100

0.3

5.3

4.3

3.3

2.3

1.3

VIN – VOUT (V)

ILOAD = 1mA

ILOAD = 10mA

ILOAD = 50mA

ILOAD = 100mA

ILOAD = 150mA

ILOAD = 200mA

MAXIMUM JUNCTION TEMPERATURE

Figure 56. LFCSP, TA = 85°C

PCB LAYOUT CONSIDERATIONS

Heat dissipation from the package can be improved by increas-

ing the amount of copper attached to the pins of the ADM7160.

However, as shown in Table 6, a point of diminishing returns is

eventually reached, beyond which an increase in the copper size

does not yield significant heat dissipation benefits.

Place the input capacitor as close as possible to the VIN and

GND pins. Place the output capacitor as close as possible to

the VOUT and GND pins. Use of 0402 or 0603 size capacitors

achieves the smallest possible footprint solution on boards

where area is limited.

Figure 57. Example of PCB Layout, TSOT Package

Figure 58. Example of PCB Layout, LFCSP Package

ADM7160ACPZN3.3-R2 Datasheet(PDF) 19 Page - Analog Devices

ADM7160ACPZN3.3-R2 Datasheet(HTML) 19 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Datasheet Download

Link URL