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PCM9211 Datasheet(PDF) 76 Page - Texas Instruments |
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PCM9211 Datasheet(HTML) 76 Page - Texas Instruments |
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76 / 121 page ![]() PCM9211 SBAS495 – JUNE 2010 www.ti.com Register 2Eh, INT0, INT1 Output Polarity Setting (Address: 2Eh, Write and Read) DATA B7 B6 B5 B4 B3 B2 B1 B0 Reg Name RSV INT1P RSV ADLVLTH1 ADLVLTH0 INT0P RSV RSV Default Value 0 0 0 0 0 0 0 0 Memo INT1P: INT1 Port, Polarity Setting 0: Negative logic (default) 1: Positive logic ADLVLTH[1:0]: ADC Input Level Detection Threshold for INT1 00: –12dB : 01: –24dB 10: –36dB 11: –48dB INT0P: INT0 Port, Polarity Setting 0: Negative logic (default) 1: Positive logic When the INT0 or INT1 Information Register is read, Register INT0 or INT1 port output is cleared. Register 2Fh, DIR Output Data Format (Address: 2Fh, Write and Read) DATA B7 B6 B5 B4 B3 B2 B1 B0 Reg Name RSV RSV RSV RSV RSV RXFMT2 RXFMT1 RXFMT0 Default Value 0 0 0 0 0 1 0 0 Memo RXFMT[2:0]: DIR Output Data Format Setting 000: 24-bit MSB first, right-justified 001: Reserved 010: Reserved 011: 16-bit MSB first, right-justified 100: 24-bit MSB first, I2S (default) 101: 24-bit MSB first, left-justified 110: Reserved 111: Reserved 76 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): PCM9211 |
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