MMPF0100NPEP datasheet(38/137 Pages) FREESCALE

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Analog Integrated Circuit Device Data



Freescale Semiconductor

PF0100

Functional Block Requirements and Behaviors

Power Generation

The SWxFREQ[1:0] register is used to set the desired switching frequency for each one of the buck regulators. Table 36 shows

the selectable options for SWxFREQ[1:0]. For each frequency, all phases will be available, this allows regulators operating at

different frequencies to have different relative switching phases. However, not all combinations are practical. For example,

2.0 MHz, 90 ° and 4.0 MHz, 180 ° are the same in terms of phasing. Table 35 shows the optimum phasing when using more than

one switching frequency.

Programmable Maximum Current

The maximum current, ISWxMAX, of each buck regulator is programmable. This allows the use of smaller inductors where lower

currents are required. Programmability is accomplished by choosing the number of paralleled power stages in each regulator.

The SWx_PWRSTG[2:0] bits on the Extended Page 2 of the register map control the number of power stages. See Table 37 for

the programmable options. Bit[0] must always be enabled to ensure the stage with the current sensor is chosen. The default

setting, SWx_PWRSTG[2:0] = 111, represents the highest maximum current. The current limit for each option is also scaled by

the percentage of power stages that are enabled.

Table 34. Regulator Phase Clock Selection

SWxPHASE[1:0]

Phase of Clock Sent to Regulator

(degrees)

180

270

Table 35. Optimum Phasing

Frequencies

Optimum Phasing

1.0 MHz

2.0 MHz

0 °

180 °

1.0 MHz

4.0 MHz

0 °

180 °

2.0 MHz

4.0 MHz

0 °

180 °

1.0 MHz

2.0 MHz

4.0 MHz

0 °

90 °

Table 36. Regulator Frequency Configuration

SWxFREQ[1:0]

Frequency

1.0 MHz

2.0 MHz

4.0 MHz

Reserved

MMPF0100NPEP Datasheet(PDF) 38 Page - Freescale Semiconductor, Inc

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