PIC16F1825T-ESS datasheet(204/448 Pages) MICROCHIP

204 / 448 page

PIC16(L)F1825/1829

DS41440C-page 204

 2010-2012 Microchip Technology Inc.

23.1

DSM Operation

The DSM module can be enabled by setting the MDEN

bit in the MDCON register. Clearing the MDEN bit in the

MDCON register, disables the DSM module by

automatically switching the carrier high and carrier low

signals to the VSS signal source. The modulator signal

source is also switched to the MDBIT in the MDCON

inactive, but that it is also consuming the least amount

of current.

The values used to select the carrier high, carrier low,

and modulator sources held by the Modulation Source,

Modulation High Carrier, and Modulation Low Carrier

control registers are not affected when the MDEN bit is

cleared and the DSM module is disabled. The values

inside these registers remain unchanged while the

DSM is inactive. The sources for the carrier high,

carrier low and modulator signals will once again be

selected when the MDEN bit is set and the DSM

module is again enabled and active.

The modulated output signal can be disabled without

shutting down the DSM module. The DSM module will

remain active and continue to mix signals, but the

output value will not be sent to the MDOUT pin. During

the time that the output is disabled, the MDOUT pin will

remain low. The modulated output can be disabled by

clearing the MDOE bit in the MDCON register.

23.2

Modulator Signal Sources

The modulator signal can be supplied from the

following sources:

• CCP1 Signal

• CCP2 Signal

• CCP3 Signal

• CCP4 Signal

• MSSP1 SDO1 Signal (SPI Mode Only)

• MSSP2 SDO2 Signal (SPI Mode Only)

• Comparator C1 Signal

• Comparator C2 Signal

• EUSART TX Signal

• External Signal on MDMIN pin

• MDBIT bit in the MDCON register

The modulator signal is selected by configuring the

MDMS <3:0> bits in the MDSRC register.

23.3

Carrier Signal Sources

The carrier high signal and carrier low signal can be

supplied from the following sources:

• CCP1 Signal

• CCP2 Signal

• CCP3 Signal

• CCP4 Signal

• Reference Clock Module Signal

• External Signal on MDCIN1 pin

• External Signal on MDCIN2 pin

•VSS

The carrier high signal is selected by configuring the

MDCH <3:0> bits in the MDCARH register. The carrier

low signal is selected by configuring the MDCL <3:0>

bits in the MDCARL register.

23.4

Carrier Synchronization

During the time when the DSM switches between

carrier high and carrier low signal sources, the carrier

data in the modulated output signal can become

truncated. To prevent this, the carrier signal can be

synchronized

the

modulator

signal.

When

synchronization is enabled, the carrier pulse that is

being mixed at the time of the transition is allowed to

transition low before the DSM switches over to the next

carrier source.

Synchronization is enabled separately for the carrier

high and carrier low signal sources. Synchronization for

the carrier high signal can be enabled by setting the

MDCHSYNC bit in the MDCARH register. Synchroniza-

tion for the carrier low signal can be enabled by setting

the MDCLSYNC bit in the MDCARL register.

Figure 23-1 through Figure 23-5 show timing diagrams

of using various synchronization methods.

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