PIC16F1825T-ESS datasheet(274/448 Pages) MICROCHIP

274 / 448 page

PIC16(L)F1825/1829

DS41440C-page 274

 2010-2012 Microchip Technology Inc.

25.6.4

I2C MASTER MODE START

CONDITION TIMING

To initiate a Start condition (Figure 25-26), the user

sets the Start Enable bit, SEN bit of the SSPxCON2

the Baud Rate Generator is reloaded with the contents

of SSPxADD<7:0> and starts its count. If SCLx and

SDAx are both sampled high when the Baud Rate

Generator times out (TBRG), the SDAx pin is driven

low. The action of the SDAx being driven low while

SCLx is high is the Start condition and causes the S bit

of the SSPxSTAT1 register to be set. Following this,

the Baud Rate Generator is reloaded with the contents

of SSPxADD<7:0> and resumes its count. When the

Baud Rate Generator times out (TBRG), the SEN bit of

the SSPxCON2 register will be automatically cleared

by hardware; the Baud Rate Generator is suspended,

leaving the SDAx line held low and the Start condition

is complete.

FIGURE 25-26:

FIRST START BIT TIMING

Note 1:

If at the beginning of the Start condition,

the SDAx and SCLx pins are already

sampled low, or if during the Start

condition, the SCLx line is sampled low

before the SDAx line is driven low, a bus

collision

occurs,

the

Bus

Collision

Interrupt Flag, BCLxIF, is set, the Start

condition is aborted and the I2C module is

reset into its Idle state.

The Philips I2C™ Specification states that

a bus collision cannot occur on a Start.

SDAx

SCLx

TBRG

1st bit

2nd bit

TBRG

SDAx = 1,

At completion of Start bit,

SCLx = 1

Write to SSPxBUF occurs here

TBRG

hardware clears SEN bit

TBRG

Write to SEN bit occurs here

Set S bit (SSPxSTAT<3>)

and sets SSPxIF bit

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