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PIC16F1825T-ESS Datasheet(PDF) 197 Page - Microchip Technology |
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PIC16F1825T-ESS Datasheet(HTML) 197 Page - Microchip Technology |
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197 / 448 page ![]() 2010-2012 Microchip Technology Inc. DS41440C-page 197 PIC16(L)F1825/1829 TABLE 21-5: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER1 Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page ANSELA — — — ANSA4 — ANSA2 ANSA1 ANSA0 126 CCP1CON P1M<1:0> DC1B<1:0> CCP1M<3:0> 236 CCP2CON P2M<1:0> DC2B<1:0> CCP2M<3:0> 236 INLVLA — — INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 127 INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 90 PIE1 TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 91 PIR1 TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF 95 TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register 191* TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register 191* TRISA — — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 125 T1CON TMR1CS<1:0> T1CKPS<1:0> T1OSCEN T1SYNC —TMR1ON 195 T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/ DONE T1GVAL T1GSS<1:0> 196 Legend: — Unimplemented location, read as ‘0’. Shaded cells are not used by the Timer1 module. * Page provides register information. |
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