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ICS9LPRS511EGLF Datasheet(PDF) 1 Page - Integrated Device Technology |
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ICS9LPRS511EGLF Datasheet(HTML) 1 Page - Integrated Device Technology |
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1 / 19 page  Integrated Circuit Systems, Inc. ICS9LPRS511 Advance Information 1137–09/05/08 Recommended Application: Low Power CK505 Programmable clock Output Features: • 2 - 0.8V differential push-pull CPU pairs • 1 - 25 MHz • 5 - PCI (33MHz) • 1 - USB, 48MHz • 1 - 24/48MHz • 1 - REF, 14.318MHz • 8 - PCIEX 0.8V differential push-pull pairs • 1 - PCIEX/DOT96MHz selectable pairs • 1 - SATACLK differential pair • 1 - 24.576MHz output Key Specifications: • CPU outputs cycle-cycle jitter < 85ps • PCIEX outputs cycle-cycle jitter < 125ps • PCI outputs cycle-cycle jitter < 250ps • +/- 300ppm frequency accuracy on CPU & PCIEX clocks Low Power Programmable Timing Control Hub™ for P4™ processor Features/Benefits: • Programmable output frequencies • Programmable output skew. • Programmable spread percentage for EMI control. • Programmable watch dog safe frequency. • Supports tight ppm accuracy clocks for Serial-ATA • Supports spread spectrum modulation, ±0.25% center spread. • Uses external 14.318MHz crystal, external crystal load caps are required for frequency tuning • Low Power differential outputs (50ohm resistor to GND not needed) • Integrated 33 Ω series resistor on all differential outputs ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals. ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners. FunctionalityTable Pin Configuration **RLATCH 1 64 25Mhz_0F_2x/Freerun* GND 2 63 GND VDD 3 62 VDD25Mhz **GSEL/24.576Mhz 4 61 VDDSATA VDDPCI 5 60 SATACLKT_LR GND 6 59 SATACLKC_LR **DOC_1 7 58 GND PCICLK0 8 57 REF0_2x/FSLC PCICLK1_3x 9 56 GND FSLB/PCICLK2_2x 10 55 X1 SELRSET/RESET#/PCICLK3 11 54 X2 PCICLK412 53VDDREF **DOC_0 13 52 SDATA VDD48 14 51 SCLK FSLA/USB_48MHz 15 50 GND *SEL24_48#/24_48Mhz 16 49 CPUT_LR0 GND 17 48 CPUC_LR0 Vtt_PwrGd/WOL_STOP# 18 47 VDDCPU DOT96T_LR/PCIeT_LR0 19 46 CPUT_LR1 DOT96C_LR/PCIeC_LR0 20 45 CPUC_LR1 GND 21 44 VDDI/O PCIeT_LR122 43GNDA PCIeC_LR123 42VDDA PCIeT_LR2 24 41 PCIeT_LR8 PCIeC_LR2 25 40 PCIeC_LR8 GND 26 39 PCIeT_LR7 PCIeT_LR3 27 38 PCIeC_LR7 PCIeC_LR328 37GND PCIeT_LR4 29 36 PCIeT_LR6 PCIeC_LR4 30 35 PCIeC_LR6 GND 31 34 PCIeT_LR5 VDDPCIEX 32 33 PCIeC_LR5 64-Pin TSSOP * Internal Pull-Up Resistor ** Internal Pull-Down Resistor RESET pin is 3.3V tolerant Bit4 Bit3 Bit2 Bit1 Bit0 CPU PCIEX PCI SATA FSLC FSLB FSLA MHz MHz MHz MHz 0 0 0 0 0 266.66 100.00 33.33 100.00 0 0 0 0 1 133.33 100.00 33.33 100.00 0 0 0 1 0 200.00 100.00 33.33 100.00 0 0 0 1 1 166.66 100.00 33.33 100.00 0 0 1 0 0 333.33 100.00 33.33 100.00 0 0 1 0 1 100.00 100.00 33.33 100.00 0 0 1 1 0 400.00 100.00 33.33 100.00 0 0 1 1 1 200.00 100.00 33.33 100.00 0 1 0 0 0 266.66 100.00 33.33 100.00 0 1 0 0 1 133.33 100.00 33.33 100.00 0 1 0 1 0 200.00 100.00 33.33 100.00 0 1 0 1 1 166.66 100.00 33.33 100.00 0 1 1 0 0 333.33 100.00 33.33 100.00 0 1 1 0 1 100.00 100.00 33.33 100.00 0 1 1 1 0 400.00 100.00 33.33 100.00 0 1 1 1 1 200.00 100.00 33.33 100.00 1 0 0 0 0 269.33 101.00 33.66 100.00 1 0 0 0 1 134.66 101.00 33.66 100.00 1 0 0 1 0 202.00 101.00 33.66 100.00 1 0 0 1 1 168.33 101.00 33.66 100.00 1 0 1 0 0 274.66 103.00 34.33 100.00 1 0 1 0 1 137.33 103.00 34.33 100.00 1 0 1 1 0 206.00 103.00 34.33 100.00 1 0 1 1 1 N/A N/A 34.33 100.00 1 1 0 0 0 279.99 105.00 35.00 100.00 1 1 0 0 1 140.00 105.00 35.00 100.00 1 1 0 1 0 210.00 105.00 35.00 100.00 1 1 0 1 1 N/A N/A 35.00 100.00 1 1 1 0 0 285.33 107.00 35.66 100.00 1 1 1 0 1 142.66 107.00 35.66 100.00 1 1 1 1 0 214.00 107.00 35.66 100.00 1 1 1 1 1 N/A N/A 35.66 100.00 |
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