L9903

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3.4 Control inputs (EN, DIR, PWM)

The cmos level inputs drive the device as shown in fig.7 and described in the truth table.

The device is activated with enable input HIGH signal. For enable input floating (not connected) or VEN=0V the

device is in standby mode. When activating the device a wake-up time of 50µs is recommended to stabilize the

internal supplies.

The DIR and PWM inputs control the driver of the external H-Bridge transistors. The motor direction can be

choosen with the DIR input, the duty cycle and frequency with the PWM input. Unconnected inputs are defined

by internal pull up resistors. During wake-up and braking and before disactivating the IC via enable both inputs

should be driven HIGH.

Table 6. Truth table:

Symbols: x Don't care

R:Resistive output

TS:Thermal shutdown

0: Logic LOW or not active

L: Output in sink condition

OV:Overvoltage

1: Logic HIGH or active

H: Output in source condition

UV:Undervoltage

T: Tristate

SC:Short Circuit

6. Only those external MOS transistors of the H-Bridge which are in short circuit condition are switched off. All others remain driven

by DIR and PWM.

7. See Application Note AN2229

3.5 Thermal shutdown

3.6 Overvoltage Shutdown

(L), the K- output is off and the diagnostic DG is LOW.

3.7 Undervoltage Shutdown

For supply voltages below the undervoltage disable threshold the gate driver remains in sink condition (L) and

the diagnostic DG is low.

Status

Control inputs

Device status

Driver stage for external

power MOS

Diagnostic

Comment

EN

DIR

PWM

TS

OV

UV

SC

GH1

GL1

GH2

GL2

DG

1

0

xxx

xx

x

R

R

T

standby mode

2

1

x

x

10

00

LL

L

L

L

thermal

shutdown

3

1

x

x

01

00

LL

L

L

L

overvoltage

4

1

x

x

00

10

LL

L

L

L

undervoltage

5

1

x

x

00

01

L

6

1

000

00

0L

H

H

L

H

7

1

x

1

00

00

H

L

H

L

H

braking mode

8

1

100

00

0

H

LL

H

H