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Copyright (C) 2010-2012 Reserved by ASIX Electronics Corporation

AX88772B Product Introduction

The following is the jumper configuration table of the AX88772B USB to 100Base-TX/FX

Ethernet (with RMII) demo boards.

Jumper

Setting

Description

J1

The J1 is the RMII/Reverse-RMII interface headers.

Please refer to

AX88772B USB to 100Base-

Reference Schematic for details.

J4

Pole #1: GPIO2

Pole #2: VCC 3.3V

Pole #3: GPIO1

Pole #4:GPIO0/PME

AX88772B GPIO Pins

J6/J8

(Default)

Set AX88772B to Internal Ethernet PHY

Set AX88772B to RMII mode

Reserved

Set AX88772B to Reverse-RMII mode

J5/J7/J9/J10

J5 : PHY_N

J7 : RMII_N

J9 : MDIO

J10 : MDC

The multi-function pins (PHY_N, RMII_N, MDIO,

MDC) for RMII/Reverse-RMII pins.

(Default)

J5 : MFA3

J7 : MFA2

J9 : MFA1

J10 : MFA0

The multi-function pins (MFA0 ~ MFA3) for LED

display purpose.

Please refer to PIN configuration of MFA in section

2.2 of AX88772B datasheet for details.

J11/J12

(Default)

Pole #1: USB_5V

Pole #2: 5V

Pole #3: DC_5V

Set

AX88772B USB to 100Base-TX/FX

mode.

The J12 connector doesn’t need to be connected.

Set

AX88772B USB to 100Base-TX/FX

mode.

The J12 connector should be connected to a 5V

power adapter.

Figure 15. AX88772B USB to 100Base-TX/FX Ethernet with RMII Demo Boards Jumper Setting Table