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IR3823 Datasheet(PDF) 21 Page - International Rectifier

Part # IR3823
Description  3A Highly Integrated SupIRBuck Single-Input Voltage, Synchronous Buck Regulator
PDF  41 Pages
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Manufacturer  IRF [International Rectifier]
Direct Link  http://www.irf.com
Logo IRF - International Rectifier

IR3823 Datasheet(HTML) 21 Page - International Rectifier

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IR3823
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© 2012 International Rectifier
August 1, 2013
into hiccup mode. PGood will go low and the internal
soft start signal will be pulled low. The converter
goes into hiccup mode with some hiccup blanking
time as shown in Figure 16. The convertor stays in
this mode until the over load or short circuit is
removed. With different SS_Select configurations,
the hiccup blanking time is different. Please refer to
the electrical table for details. The actual DC output
current limit point will be greater than the valley point
by an amount equal to approximately half of peak to
peak inductor ripple current.
2
i
I
I
LIMIT
OCP
IOCP= DC current limit hiccup point
ILIMIT= Over current limit (Valley of Inductor Current)
∆i= Peak-to-peak inductor ripple current
Figure 16: Timing Diagram for Hiccup OCP
Over current limit is affected by the VCC voltage. For
some single rail operations where Vin is 5V or less,
the OCP limit will de-rated due to the drop of VCC
voltage. Figure 17 and Figure 18 show the over
current limit for two single rail applications with
Vin=PVin=5V and Vin=PVin=VCC=4.5V respectively.
Figure 17:OCP Limit at Vin=PVin=5V using Internal LDO
Figure 18: OCP Limit at Vin=PVin=VCC=4.5V
OVER-VOLTAGE PROTECTION (OVP)
Over-voltage protection in IR3823 is achieved by
comparing FB pin voltage to a pre-set threshold.
OVP threshold is set at 1.2×Vref. When FB pin
voltage exceeds the over voltage threshold, an over
voltage trip signal asserts after 2us (typ.) delay.
Then the high side drive signal HDrv is turned off
immediately, PGood flags low. The sync FET
remains on to discharge the output capacitor. When
the VFB voltage drops below the threshold, the sync
FET turns off to prevent the complete depletion of
the output capacitor. After that, HDrv remains off
until a reset is performed by cycling either Vcc or
Enable. Figure 19 shows the timing diagram for over
voltage
protection.
Please
note
that
OVP
comparator becomes active only when the IR3823 is
enabled.
 
Figure 19: Timing Diagram for Over Voltage Protection



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