MCR03EZPFX1002 datasheet(15/32 Pages) IRF

15 / 32 page

Rev 6.0

PD-97508

IR3832WMPbF

Power Good Output

The IC continually monitors the output voltage via

Feedback (Fb pin). The Power Good signal is

flagged when the Fb pin voltage is above 0.5V

and between 85% to 115 % of Vp. This pin is

open drain and it needs to be externally pulled

high. High state indicates that output is in

regulation. Fig. 8a shows the PGood timing

diagram for non-tracking operation. In this case,

during startup, PGood goes high after the SS

voltage reaches 2.1V if the Fb voltage is within

the PGood comparator window. Fig. 8a. and Fig

8b. also show a 256 cycle delay between the Fb

voltage entering within the thresholds defined by

the PGood window and PGood going high.

Thermal Shutdown

Temperature

sensing

provided

inside

IR3832W. The trip threshold is typically set to

140oC. When trip threshold is exceeded, thermal

shutdown

turns

off

both

MOSFETs

and

discharges the soft start capacitor.

Automatic restart is initiated when the sensed

temperature drops within the operating range.

There is a 20oC hysteresis in the thermal

shutdown threshold.

Fig.4A IR3832W Non-Tracking Operation

TIMING DIAGRAM OF PGOOD FUNCTION

Fig.8b IR3832W Tracking Operation

MCR03EZPFX1002 Datasheet(PDF) 15 Page - International Rectifier