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PIC18F2610E/SOSQTP Datasheet(PDF) 225 Page - Microchip Technology |
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PIC18F2610E/SOSQTP Datasheet(HTML) 225 Page - Microchip Technology |
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225 / 376 page  © 2009 Microchip Technology Inc. DS39636D-page 227 PIC18F2X1X/4X1X 19.9 Analog Input Connection Considerations A simplified circuit for an analog input is shown in Figure 19-4. Since the analog pins are connected to a digital output, they have reverse biased diodes to VDD and VSS. The analog input, therefore, must be between VSS and VDD. If the input voltage deviates from this range by more than 0.6V in either direction, one of the diodes is forward biased and a latch-up condition may occur. A maximum source impedance of 10 k Ω is recommended for the analog sources. Any external component connected to an analog input pin, such as a capacitor or a Zener diode, should have very little leakage current. FIGURE 19-4: COMPARATOR ANALOG INPUT MODEL TABLE 19-1: REGISTERS ASSOCIATED WITH COMPARATOR MODULE VA RS < 10k AIN CPIN 5 pF VDD VT = 0.6V VT = 0.6V RIC ILEAKAGE ±500 nA VSS Legend: CPIN = Input Capacitance VT = Threshold Voltage ILEAKAGE = Leakage Current at the pin due to various junctions RIC = Interconnect Resistance RS = Source Impedance VA = Analog Voltage Comparator Input Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset Values on page CMCON C2OUT C1OUT C2INV C1INV CIS CM2 CM1 CM0 53 CVRCON CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0 53 INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 54 PIR2 OSCFIF CMIF — — BCLIF HLVDIF TMR3IF CCP2IF 54 PIE2 OCSFIE CMIE — — BCLIE HLVDIE TMR3IE CCP2IE 54 IPR2 OSCFIP CMIP — — BCLIP HLVDIP TMR3IP CCP2IP 54 PORTA RA7(1) RA6(1) RA5 RA4 RA3 RA2 RA1 RA0 54 LATA LATA7(1) LATA6(1) PORTA Data Latch Register (Read and Write to Data Latch) 54 TRISA TRISA7(1) TRISA6(1) PORTA Data Direction Control Register 54 Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the comparator module. Note 1: PORTA<7:6> and their direction and latch bits are individually configured as port pins based on various primary oscillator modes. When disabled, these bits read as ‘0’. |
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