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PIC18F2610E/SOSQTP Datasheet(PDF) 256 Page - Microchip Technology |
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PIC18F2610E/SOSQTP Datasheet(HTML) 256 Page - Microchip Technology |
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256 / 376 page ![]() PIC18F2X1X/4X1X DS39636D-page 258 © 2009 Microchip Technology Inc. 22.9 Single-Supply ICSP Programming The LVP Configuration bit enables Single-Supply ICSP Programming (formerly known as Low-Voltage ICSP Programming or LVP). When Single-Supply Program- ming is enabled, the microcontroller can be programmed without requiring high voltage being applied to the MCLR/VPP/RE3 pin, but the RB5/KBI1/PGM pin is then dedicated to controlling Program mode entry and is not available as a general purpose I/O pin. While programming, using Single-Supply Program- ming mode, VDD is applied to the MCLR/VPP/RE3 pin as in Normal Execution mode. To enter Programming mode, VDD is applied to the PGM pin. If Single-Supply ICSP Programming mode will not be used, the LVP bit can be cleared. RB5/KBI1/PGM then becomes available as the digital I/O pin, RB5. The LVP bit may be set or cleared only when using standard high-voltage programming (VIHH applied to the MCLR/ VPP/RE3 pin). Once LVP has been disabled, only the standard high-voltage programming is available and must be used to program the device. Memory that is not code-protected can be erased using either a block erase, or erased row by row, then written at any specified VDD. If code-protected memory is to be erased, a block erase is required. If a block erase is to be performed when using Low-Voltage Programming, the device must be supplied with VDD of 4.5V to 5.5V. Note 1: High-voltage programming is always available, regardless of the state of the LVP bit or the PGM pin, by applying VIHH to the MCLR pin. 2: By default, Single-Supply ICSP is enabled in unprogrammed devices (as supplied from Microchip) and erased devices. 3: When Single-Supply Programming is enabled, the RB5 pin can no longer be used as a general purpose I/O pin. 4: When LVP is enabled, externally pull the PGM pin to VSS to allow normal program execution. |
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