CB2012T2R2M datasheet(12/16 Pages) LINER

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LTC3410

3410fb

APPLICATIO S I FOR ATIO

Figure 4a. LTC3410 Layout Diagram

Figure 5a. LTC3410 Suggested Layout

RUN

LTC3410

GND

CFWD

BOLD LINES INDICATE HIGH CURRENT PATHS

VIN

VOUT

3410 F04a

–

VFB

VIN

CIN

COUT

RUN

LTC3410-1.875

GND

BOLD LINES INDICATE HIGH CURRENT PATHS

VIN

VOUT

3410 F04b

–

VOUT

VIN

CIN

COUT

2. Does the VFB pin connect directly to the feedback

resistors? The resistive divider R1/R2 must be con-

nected between the (+) plate of COUT and ground.

3. Does the (+) plate of CIN connect to VIN as closely as

possible? This capacitor provides the AC current to the

internal power MOSFETs.

4. Keep the (–) plates of CIN and COUT as close as possible.

5. Keep the switching node, SW, away from the sensitive

VFB node.

Figure 4b. LTC3410-1.875 Layout Diagram

LTC3410

GND

3410 F05a

PIN 1

VOUT

VIN

VIA TO VOUT

VIA TO VIN

VIA TO GND

COUT

CIN

CFWD

LTC3410-

1.875

3410 F05b

PIN 1

VOUT

VIN

VIA TO VIN

COUT

CIN

Figure 5b. LTC3410 Fixed Output Voltage

Suggested Layout

Design Example

As a design example, assume the LTC3410 is used in a

single lithium-ion battery-powered cellular phone

application. The VIN will be operating from a maximum of

4.2V down to about 2.7V. The load current requirement

is a maximum of 0.3A but most of the time it will be in

standby mode, requiring only 2mA. Efficiency at both low

and high load currents is important. Output voltage is

3V. With this information we can calculate L using

Equation (1),

OUT

= () ∆()

−

⎛

⎝⎜

⎞

⎠⎟

()

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