ADS4229IRGC25 datasheet(29/67 Pages) TI1

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ADS4229

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SBAS550B – JUNE 2011 – REVISED AUGUST 2012

LVDS CLKOUT

LVDS DATA

STBY

PDN GLOBAL

STRENGTH

Bit 7

STBY: Standby setting

0 = Normal operation

1 = Both channels are put in standby; wakeup time from this mode is fast (typically 50 µs).

Bit 6

LVDS CLKOUT STRENGTH: LVDS output clock buffer strength setting

0 = LVDS output clock buffer at default strength to be used with 100-

Ω external termination

1 = LVDS output clock buffer has double strength to be used with 50-

Ω external termination

Bit 5

LVDS DATA STRENGTH

0 = All LVDS data buffers at default strength to be used with 100-

Ω external termination

1 = All LVDS data buffers have double strength to be used with 50-

Ω external termination

Bits[4:3]

Always write '0'

Bit 2

PDN GLOBAL

0 = Normal operation

1 = Total power down; all ADC channels, internal references, and output buffers are powered

down. Wakeup time from this mode is slow (typically 100 µs).

Bits[1:0]

Always write '0'

HIGH FREQ MODE CH B

Bits[7:1]

Always write '0'

Bit 0

HIGH FREQ MODE CH B: High-frequency mode for channel B

0 = Default

1 = Use this mode for high input frequencies greater than 200 MHz

HIGH FREQ MODE CH A

Bits[7:1]

Always write '0'

Bit 0

HIGH FREQ MODE CH A: High-frequency mode for channel A

0 = Default

1 = Use this mode for high input frequencies greater than 200 MHz

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