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DSPIC30F0010AT-30E/PF Datasheet(PDF) 225 Page - Microchip Technology

Part # DSPIC30F0010AT-30E/PF
Description  High-Performance, 16-Bit Digital Signal Controllers
PDF  236 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC30F0010AT-30E/PF Datasheet(HTML) 225 Page - Microchip Technology

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© 2007 Microchip Technology Inc.
DS70150C-page 223
dsPIC30F6010A/6015
APPENDIX A:
MIGRATION FROM
dsPIC30F6010 TO
dsPIC30F6010A
The dsPIC30F6010A supersedes the dsPIC30F6010
device. The “A” version of the silicon is identical in
nearly all aspects compared to the dsPIC30F6010
device.
Review
the
latest
dsPIC30F6010A/6015
Silicon Errata documents posted on the Microchip web
site to see what is fixed from the dsPIC30F6010 Rev.
B2 Silicon Errata (DS80195B) document.
This appendix describes the differences between the
dsPIC30F6010 and dsPIC30F6010A devices.
A.1
Code Compatibility
For the most part, dsPIC30F code developed with the
MPLAB C30 C Compiler and MPLAB ASM30 Assem-
bler is directly portable between the dsPIC30F6010
and dsPIC30F6010A devices. However, in some cases
small changes may be required depending on which
features have been enhanced. To migrate source code
to the dsPIC30F6010A device, perform these two
steps:
1.
Include the appropriate dsPIC30F6010A device
header (.h) and include (.inc) files in the
source code files.
2.
Remove any workarounds implemented in
source code or MPLAB C30 command-line
options
for
errata
described
in
the
“dsPIC30F6010
Rev.
B2
Silicon
Errata”
(DS80195B) document.
Other changes are called out in this section. Read the
latest dsPIC30F6010A/6015 Silicon Errata documents
posted on the Microchip web site.
A.2
Oscillator Operation
Several oscillator modes have been added to the
dsPIC30F6010A device:
• FRC with x4, x8 and x16 PLL mode
• HS/2 with x4, x8 and x16 PLL mode
• HS/3 with x4, x8 and x16 PLL mode
The
new
oscillator
modes
are
presented
in
Section 21.0 “System Integration”. In support of the
FRC, the OSCTUN Special Function Register (SFR)
has been added. This register includes four FRC tuning
bits (TUN<5:0>). There are no code or operational
compatibility issues to address for this new feature.
Another important change deals with the OSCCON
SFR. Bits have been added to both the COSC and
NOSC functional definitions. Use the dsPIC30F6010A
device header and include files to achieve code
portability with the OSCCON SFR.
A.3
Device Configuration Registers
In support of the new oscillator modes, the FOSC
Configuration
register
has
been
modified.
The
dsPIC30F6010A device header and include files
provide the updated bit field definitions and macros for
the device Configuration registers. Please refer to
these new macros when embedding specific device
configuration information in the C and Assembler
source files.
A.4
Electrical Characteristics
The dsPIC30F6010A device is rated at 30 MIPS @
4.5-5.5 VDC and 20 MIPS @ 3.0-3.6 VDC for the indus-
trial temperature range. Even though compatible
devices are tested to the same electrical specifications,
the device characteristics may have changed due to
changes in the manufacturing process. These differ-
ences should not affect the systems that were
designed well within the device specifications. For sys-
tems that operate close to or outside the specification
limits, manufacturing differences may cause the device
to behave differently.
A.5
Device Packages
The dsPIC30F6010A device is offered in the following
TQFP pages:
• 80-Pin TQFP 12x12x1mm (new designs)
• 80-Pin TQFP 14x14x1mm (migration support)
Refer to Section 25.0 “Packaging Information” for
details on these packages.
Note:
Oscillator operation should be verified to
ensure that it starts and performs as
expected. You may need to adjust the load
capacitor and/or the oscillator mode to
achieve the proper values.



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